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authorD. Shah <dave@ds0.me>2021-01-29 12:58:41 +0000
committerD. Shah <dave@ds0.me>2021-02-02 17:00:14 +0000
commit9388df19d3ab3ca1b127defafe6fa3f71147f451 (patch)
tree09d4cf8ffab3c6fb1e1c4593e693a62ef5606973 /ice40
parent6d23461bcd83d27c6b365948a5e85db80389832e (diff)
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refactor: Replace getXName().c_str(ctx) with ctx->nameOfX
This makes the ongoing migration to IdStringList easier. Signed-off-by: D. Shah <dave@ds0.me>
Diffstat (limited to 'ice40')
-rw-r--r--ice40/delay.cc2
-rw-r--r--ice40/pack.cc9
2 files changed, 5 insertions, 6 deletions
diff --git a/ice40/delay.cc b/ice40/delay.cc
index 40dcff16..a3469876 100644
--- a/ice40/delay.cc
+++ b/ice40/delay.cc
@@ -80,7 +80,7 @@ void ice40DelayFuzzerMain(Context *ctx)
printf("%s %d %d %s %s %d %d\n", cursor == dst ? "dst" : "src",
int(ctx->chip_info->wire_data[cursor.index].x), int(ctx->chip_info->wire_data[cursor.index].y),
- ctx->getWireType(cursor).c_str(ctx), ctx->getWireName(cursor).c_str(ctx), int(delay),
+ ctx->getWireType(cursor).c_str(ctx), ctx->nameOfWire(cursor), int(delay),
int(ctx->estimateDelay(cursor, dst)));
if (cursor == src)
diff --git a/ice40/pack.cc b/ice40/pack.cc
index bac8e170..9add84cd 100644
--- a/ice40/pack.cc
+++ b/ice40/pack.cc
@@ -417,7 +417,7 @@ static BelId find_padin_gbuf(Context *ctx, BelId bel, IdString port_name)
auto wire = ctx->getBelPinWire(bel, port_name);
if (wire == WireId())
- log_error("BEL '%s' has no global buffer connection available\n", ctx->getBelName(bel).c_str(ctx));
+ log_error("BEL '%s' has no global buffer connection available\n", ctx->nameOfBel(bel));
for (auto src_bel : ctx->getWireBelPins(wire)) {
if (ctx->getBelType(src_bel.bel) == id_SB_GB && src_bel.pin == id_GLOBAL_BUFFER_OUTPUT) {
@@ -839,7 +839,7 @@ static void place_plls(Context *ctx)
if (conflict_cell == ci)
continue;
log_error("PLL '%s' PACKAGEPIN forces it to BEL %s but BEL is already assigned to PLL '%s'\n",
- ci->name.c_str(ctx), ctx->getBelName(found_bel).c_str(ctx), conflict_cell->name.c_str(ctx));
+ ci->name.c_str(ctx), ctx->nameOfBel(found_bel), conflict_cell->name.c_str(ctx));
}
// Is it user constrained ?
@@ -849,8 +849,7 @@ static void place_plls(Context *ctx)
if (bel_constrain != found_bel)
log_error("PLL '%s' is user constrained to %s but can only be placed in %s based on its PACKAGEPIN "
"connection\n",
- ci->name.c_str(ctx), ctx->getBelName(bel_constrain).c_str(ctx),
- ctx->getBelName(found_bel).c_str(ctx));
+ ci->name.c_str(ctx), ctx->nameOfBel(bel_constrain), ctx->nameOfBel(found_bel));
} else {
// No, we can constrain it ourselves
ci->attrs[ctx->id("BEL")] = ctx->getBelName(found_bel).str(ctx);
@@ -999,7 +998,7 @@ static void place_plls(Context *ctx)
log_error("PLL '%s' couldn't be placed anywhere, no suitable BEL found.%s\n", ci->name.c_str(ctx),
could_be_pad ? " Did you mean to use a PAD PLL ?" : "");
- log_info(" constrained PLL '%s' to %s\n", ci->name.c_str(ctx), ctx->getBelName(found_bel).c_str(ctx));
+ log_info(" constrained PLL '%s' to %s\n", ci->name.c_str(ctx), ctx->nameOfBel(found_bel));
if (could_be_pad)
log_info(" (given its connections, this PLL could have been a PAD PLL)\n");