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author | Clifford Wolf <clifford@clifford.at> | 2018-08-03 17:37:59 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2018-08-03 17:37:59 +0200 |
commit | 2a1d54389f1bcba51482daa43841436e1b854912 (patch) | |
tree | b0e042517e3e2cf86f911df0b6818cf7c8012bee /ice40/gfx.h | |
parent | 80e6b17ec9da25ff089a626b2fb5043876814307 (diff) | |
download | nextpnr-2a1d54389f1bcba51482daa43841436e1b854912.tar.gz nextpnr-2a1d54389f1bcba51482daa43841436e1b854912.tar.bz2 nextpnr-2a1d54389f1bcba51482daa43841436e1b854912.zip |
Add iCE40 pseudo-pips for lut permutation
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'ice40/gfx.h')
-rw-r--r-- | ice40/gfx.h | 45 |
1 files changed, 44 insertions, 1 deletions
diff --git a/ice40/gfx.h b/ice40/gfx.h index 7eeaccf1..5a98e79d 100644 --- a/ice40/gfx.h +++ b/ice40/gfx.h @@ -34,7 +34,10 @@ const float local_swbox_x2 = 0.73; const float local_swbox_y1 = 0.05; const float local_swbox_y2 = 0.55; -const float logic_cell_x1 = 0.76; +const float lut_swbox_x1 = 0.76; +const float lut_swbox_x2 = 0.80; + +const float logic_cell_x1 = 0.83; const float logic_cell_x2 = 0.95; const float logic_cell_y1 = 0.05; const float logic_cell_y2 = 0.10; @@ -135,6 +138,46 @@ enum GfxTileWireId TILE_WIRE_LUTFF_7_IN_2, TILE_WIRE_LUTFF_7_IN_3, + TILE_WIRE_LUTFF_0_IN_0_LUT, + TILE_WIRE_LUTFF_0_IN_1_LUT, + TILE_WIRE_LUTFF_0_IN_2_LUT, + TILE_WIRE_LUTFF_0_IN_3_LUT, + + TILE_WIRE_LUTFF_1_IN_0_LUT, + TILE_WIRE_LUTFF_1_IN_1_LUT, + TILE_WIRE_LUTFF_1_IN_2_LUT, + TILE_WIRE_LUTFF_1_IN_3_LUT, + + TILE_WIRE_LUTFF_2_IN_0_LUT, + TILE_WIRE_LUTFF_2_IN_1_LUT, + TILE_WIRE_LUTFF_2_IN_2_LUT, + TILE_WIRE_LUTFF_2_IN_3_LUT, + + TILE_WIRE_LUTFF_3_IN_0_LUT, + TILE_WIRE_LUTFF_3_IN_1_LUT, + TILE_WIRE_LUTFF_3_IN_2_LUT, + TILE_WIRE_LUTFF_3_IN_3_LUT, + + TILE_WIRE_LUTFF_4_IN_0_LUT, + TILE_WIRE_LUTFF_4_IN_1_LUT, + TILE_WIRE_LUTFF_4_IN_2_LUT, + TILE_WIRE_LUTFF_4_IN_3_LUT, + + TILE_WIRE_LUTFF_5_IN_0_LUT, + TILE_WIRE_LUTFF_5_IN_1_LUT, + TILE_WIRE_LUTFF_5_IN_2_LUT, + TILE_WIRE_LUTFF_5_IN_3_LUT, + + TILE_WIRE_LUTFF_6_IN_0_LUT, + TILE_WIRE_LUTFF_6_IN_1_LUT, + TILE_WIRE_LUTFF_6_IN_2_LUT, + TILE_WIRE_LUTFF_6_IN_3_LUT, + + TILE_WIRE_LUTFF_7_IN_0_LUT, + TILE_WIRE_LUTFF_7_IN_1_LUT, + TILE_WIRE_LUTFF_7_IN_2_LUT, + TILE_WIRE_LUTFF_7_IN_3_LUT, + TILE_WIRE_LUTFF_0_LOUT, TILE_WIRE_LUTFF_1_LOUT, TILE_WIRE_LUTFF_2_LOUT, |