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authorClifford Wolf <clifford@clifford.at>2018-06-17 15:39:19 +0200
committerClifford Wolf <clifford@clifford.at>2018-06-17 15:39:19 +0200
commitf38c5660cbc85baa48bb8b16d3877269d66c8bd5 (patch)
treee9cf3a9583326b1123531b36d7630db0e82a6b80 /ice40/chipdb.py
parenta4ad3533fe73d279743ba72e6e7cb01be3dc0d03 (diff)
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Move BitstreamInfoPOD to ice40 chipdb blob
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'ice40/chipdb.py')
-rw-r--r--ice40/chipdb.py22
1 files changed, 14 insertions, 8 deletions
diff --git a/ice40/chipdb.py b/ice40/chipdb.py
index c01d3a6e..98a064ba 100644
--- a/ice40/chipdb.py
+++ b/ice40/chipdb.py
@@ -753,7 +753,7 @@ for switch in switches:
si["bits"] = bitlist
switchinfo.append(si)
-bba.l("switch_data_%s" % dev_name, "SwitchInfoPOD", export=True)
+bba.l("switch_data_%s" % dev_name, "SwitchInfoPOD")
for info in switchinfo:
bba.u32(len(info["bits"]), "num_bits")
bba.u8(info["x"], "x")
@@ -766,14 +766,14 @@ for info in switchinfo:
bba.u8(0, "row<%d> (unused)" % i)
bba.u8(0, "col<%d> (unused)" % i)
-bba.l("tile_data_%s" % dev_name, "TileInfoPOD", export=True)
+bba.l("tile_data_%s" % dev_name, "TileInfoPOD")
for info in tileinfo:
bba.u8(info["cols"], "cols")
bba.u8(info["rows"], "rows")
bba.u16(info["num_entries"], "num_entries")
bba.r(info["entries"], "entries")
-bba.l("ieren_data_%s" % dev_name, "IerenInfoPOD", export=True)
+bba.l("ieren_data_%s" % dev_name, "IerenInfoPOD")
for ieren in ierens:
bba.u8(ieren[0], "iox")
bba.u8(ieren[1], "ioy")
@@ -782,16 +782,22 @@ for ieren in ierens:
bba.u8(ieren[4], "iery")
bba.u8(ieren[5], "ierz")
+if len(ierens) % 2 == 1:
+ bba.u16(0, "padding")
+
+bba.l("bits_info_%s" % dev_name, "BitstreamInfoPOD", export=True)
+bba.u32(len(switchinfo), "num_switches")
+bba.u32(len(ierens), "num_ierens")
+bba.r("tile_data_%s" % dev_name, "tiles_nonrouting")
+bba.r("switch_data_%s" % dev_name, "switches")
+bba.r("ieren_data_%s" % dev_name, "ierens")
+
bba.finalize()
if compact_output:
bba.write_compact_c(sys.stdout)
else:
bba.write_verbose_c(sys.stdout)
-print("static BitstreamInfoPOD bits_info_%s = {" % dev_name)
-print(" %d, %d, tile_data_%s, switch_data_%s, ieren_data_%s" % (len(switchinfo), len(ierens), dev_name, dev_name, dev_name))
-print("};")
-
print("static TileType tile_grid_%s[%d] = {" % (dev_name, len(tilegrid)))
print(" " + ",\n ".join(tilegrid))
print("};")
@@ -806,7 +812,7 @@ print('NEXTPNR_NAMESPACE_BEGIN')
print("ChipInfoPOD chip_info_%s = {" % dev_name)
print(" %d, %d, %d, %d, %d, %d, %d," % (dev_width, dev_height, len(bel_name), num_wires, len(pipinfo), len(switchinfo), len(packageinfo)))
print(" bel_data, wire_data_%s, pip_data_%s," % (dev_name, dev_name))
-print(" tile_grid_%s, &bits_info_%s, package_info_%s" % (dev_name, dev_name, dev_name))
+print(" tile_grid_%s, bits_info_%s, package_info_%s" % (dev_name, dev_name, dev_name))
print("};")
print('NEXTPNR_NAMESPACE_END')