aboutsummaryrefslogtreecommitdiffstats
path: root/ice40/chipdb.py
diff options
context:
space:
mode:
authorDavid Shah <davey1576@gmail.com>2019-02-23 17:38:33 +0000
committerGitHub <noreply@github.com>2019-02-23 17:38:33 +0000
commit92a4a48f47fc544950201935db9532a970e2d5b8 (patch)
treed784d61762f742f01b26daf9ad06caf5ff54f930 /ice40/chipdb.py
parente8d3aaaf34895a073e4023192d97fc936d090990 (diff)
parent7044f56246417c4db9fc9df2feebb8138e56d51a (diff)
downloadnextpnr-92a4a48f47fc544950201935db9532a970e2d5b8.tar.gz
nextpnr-92a4a48f47fc544950201935db9532a970e2d5b8.tar.bz2
nextpnr-92a4a48f47fc544950201935db9532a970e2d5b8.zip
Merge pull request #241 from corecode/u4k
ice40: support u4k
Diffstat (limited to 'ice40/chipdb.py')
-rw-r--r--ice40/chipdb.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/ice40/chipdb.py b/ice40/chipdb.py
index 96231b26..824c3d94 100644
--- a/ice40/chipdb.py
+++ b/ice40/chipdb.py
@@ -492,7 +492,7 @@ def wiredelay(wire_idx, db):
def init_tiletypes(device):
global num_tile_types, tile_sizes, tile_bits
- if device == "5k":
+ if device in ["5k", "u4k"]:
num_tile_types = 10
else:
num_tile_types = 5