aboutsummaryrefslogtreecommitdiffstats
path: root/ice40/cells.h
diff options
context:
space:
mode:
authorSergiusz Bazanski <q3k@q3k.org>2018-07-24 01:38:20 +0100
committerSergiusz Bazanski <q3k@q3k.org>2018-07-24 02:55:40 +0100
commitfae7994bc34b302dbd35c0793a9ce9f81234dbc1 (patch)
tree78fa5176ce9ccc78791894d475566c1a4766c17f /ice40/cells.h
parentdbf79d78bbae387817fc442cfda06b5b17c32c40 (diff)
downloadnextpnr-fae7994bc34b302dbd35c0793a9ce9f81234dbc1.tar.gz
nextpnr-fae7994bc34b302dbd35c0793a9ce9f81234dbc1.tar.bz2
nextpnr-fae7994bc34b302dbd35c0793a9ce9f81234dbc1.zip
clang-format
Diffstat (limited to 'ice40/cells.h')
-rw-r--r--ice40/cells.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/ice40/cells.h b/ice40/cells.h
index 4bc50e8a..16135448 100644
--- a/ice40/cells.h
+++ b/ice40/cells.h
@@ -84,7 +84,6 @@ inline bool is_sb_pll40_pad(const BaseCtx *ctx, const CellInfo *cell)
cell->type == ctx->id("SB_PLL40_2F_PAD");
}
-
uint8_t sb_pll40_type(const BaseCtx *ctx, const CellInfo *cell);
// Convert a SB_LUT primitive to (part of) an ICESTORM_LC, swapping ports