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author | David Shah <davey1576@gmail.com> | 2018-06-25 11:43:59 +0200 |
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committer | David Shah <davey1576@gmail.com> | 2018-06-25 11:43:59 +0200 |
commit | bdd54a68471a68bb9e3f8125c1457cd039cc768b (patch) | |
tree | 7f96fc65d7714699b2b1ec2f707beeefedb76dd3 /ice40/cells.h | |
parent | 1b7ed56f6ffd11d70d79cd96fb370f331e6d8df0 (diff) | |
download | nextpnr-bdd54a68471a68bb9e3f8125c1457cd039cc768b.tar.gz nextpnr-bdd54a68471a68bb9e3f8125c1457cd039cc768b.tar.bz2 nextpnr-bdd54a68471a68bb9e3f8125c1457cd039cc768b.zip |
Refactor: remove PlacementValidityChecker and move methods to Arch
Signed-off-by: David Shah <davey1576@gmail.com>
Diffstat (limited to 'ice40/cells.h')
-rw-r--r-- | ice40/cells.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/ice40/cells.h b/ice40/cells.h index 7b5e63d9..a8891598 100644 --- a/ice40/cells.h +++ b/ice40/cells.h @@ -30,10 +30,10 @@ NEXTPNR_NAMESPACE_BEGIN CellInfo *create_ice_cell(Context *ctx, IdString type, std::string name = ""); // Return true if a cell is a LUT -inline bool is_lut(const Context *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_LUT4"); } +inline bool is_lut(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_LUT4"); } // Return true if a cell is a flipflop -inline bool is_ff(const Context *ctx, const CellInfo *cell) +inline bool is_ff(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_DFF") || cell->type == ctx->id("SB_DFFE") || cell->type == ctx->id("SB_DFFSR") || cell->type == ctx->id("SB_DFFR") || cell->type == ctx->id("SB_DFFSS") || cell->type == ctx->id("SB_DFFS") || @@ -46,26 +46,26 @@ inline bool is_ff(const Context *ctx, const CellInfo *cell) cell->type == ctx->id("SB_DFFNESS") || cell->type == ctx->id("SB_DFFNES"); } -inline bool is_carry(const Context *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_CARRY"); } +inline bool is_carry(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_CARRY"); } -inline bool is_lc(const Context *ctx, const CellInfo *cell) { return cell->type == ctx->id("ICESTORM_LC"); } +inline bool is_lc(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("ICESTORM_LC"); } // Return true if a cell is a SB_IO -inline bool is_sb_io(const Context *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_IO"); } +inline bool is_sb_io(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_IO"); } // Return true if a cell is a global buffer -inline bool is_gbuf(const Context *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_GB"); } +inline bool is_gbuf(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_GB"); } // Return true if a cell is a RAM -inline bool is_ram(const Context *ctx, const CellInfo *cell) +inline bool is_ram(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_RAM40_4K") || cell->type == ctx->id("SB_RAM40_4KNR") || cell->type == ctx->id("SB_RAM40_4KNW") || cell->type == ctx->id("SB_RAM40_4KNRNW"); } -inline bool is_sb_lfosc(const Context *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_LFOSC"); } +inline bool is_sb_lfosc(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_LFOSC"); } -inline bool is_sb_hfosc(const Context *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_HFOSC"); } +inline bool is_sb_hfosc(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_HFOSC"); } // Convert a SB_LUT primitive to (part of) an ICESTORM_LC, swapping ports // as needed. Set no_dff if a DFF is not being used, so that the output @@ -82,13 +82,13 @@ void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_l void nxio_to_sb(Context *ctx, CellInfo *nxio, CellInfo *sbio); // Return true if a port is a clock port -bool is_clock_port(const Context *ctx, const PortRef &port); +bool is_clock_port(const BaseCtx *ctx, const PortRef &port); // Return true if a port is a reset port -bool is_reset_port(const Context *ctx, const PortRef &port); +bool is_reset_port(const BaseCtx *ctx, const PortRef &port); // Return true if a port is a clock enable port -bool is_enable_port(const Context *ctx, const PortRef &port); +bool is_enable_port(const BaseCtx *ctx, const PortRef &port); NEXTPNR_NAMESPACE_END |