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authorDavid Shah <davey1576@gmail.com>2018-07-18 14:01:19 +0200
committerDavid Shah <davey1576@gmail.com>2018-07-18 14:01:19 +0200
commitddd94edfe0af32a33e5b71b9768c706f8b37d61b (patch)
treeaa53be9c75ced41c1837b99babc276687f379f29 /ice40/cells.cc
parentacdaec249ad9b6288cc053e4d504ca8f14e41ec6 (diff)
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ice40: Fixes for inverted clocks
Signed-off-by: David Shah <davey1576@gmail.com>
Diffstat (limited to 'ice40/cells.cc')
-rw-r--r--ice40/cells.cc3
1 files changed, 2 insertions, 1 deletions
diff --git a/ice40/cells.cc b/ice40/cells.cc
index 1ba40970..8e8679ee 100644
--- a/ice40/cells.cc
+++ b/ice40/cells.cc
@@ -256,7 +256,8 @@ bool is_clock_port(const BaseCtx *ctx, const PortRef &port)
if (port.cell->type == ctx->id("ICESTORM_LC"))
return port.port == ctx->id("CLK");
if (is_ram(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_RAM"))
- return port.port == ctx->id("RCLK") || port.port == ctx->id("WCLK");
+ return port.port == ctx->id("RCLK") || port.port == ctx->id("WCLK") || port.port == ctx->id("RCLKN") ||
+ port.port == ctx->id("WCLKN");
return false;
}