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authorDavid Shah <davey1576@gmail.com>2018-06-13 18:18:57 +0200
committerDavid Shah <davey1576@gmail.com>2018-06-13 18:18:57 +0200
commit537b0e6e9442b2c33b0c130d0540e5541b34fecd (patch)
tree298836aff0f739839dad999a0bc3cb45fa42ea9a /ice40/cells.cc
parent3d5954f9972a1962d76c4eb1f2eb13a13128f372 (diff)
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ice40: Rename ICESTORM_RAM pins
Signed-off-by: David Shah <davey1576@gmail.com>
Diffstat (limited to 'ice40/cells.cc')
-rw-r--r--ice40/cells.cc24
1 files changed, 24 insertions, 0 deletions
diff --git a/ice40/cells.cc b/ice40/cells.cc
index a8200d76..b7a02790 100644
--- a/ice40/cells.cc
+++ b/ice40/cells.cc
@@ -79,6 +79,30 @@ CellInfo *create_ice_cell(Design *design, IdString type, IdString name)
add_port(new_cell, "D_IN_0", PORT_OUT);
add_port(new_cell, "D_IN_1", PORT_OUT);
+ } else if (type == "ICESTORM_RAM") {
+ new_cell->params["NEG_CLK_W"] = "0";
+ new_cell->params["NEG_CLK_R"] = "0";
+ new_cell->params["WRITE_MODE"] = "0";
+ new_cell->params["READ_MODE"] = "0";
+
+ add_port(new_cell, "RCLK", PORT_IN);
+ add_port(new_cell, "RCLKE", PORT_IN);
+ add_port(new_cell, "RE", PORT_IN);
+
+ add_port(new_cell, "WCLK", PORT_IN);
+ add_port(new_cell, "WCLKE", PORT_IN);
+ add_port(new_cell, "WE", PORT_IN);
+
+ for (int i = 0; i < 16; i++) {
+ add_port(new_cell, "WDATA_" + std::to_string(i), PORT_IN);
+ add_port(new_cell, "MASK_" + std::to_string(i), PORT_IN);
+ add_port(new_cell, "RDATA_" + std::to_string(i), PORT_OUT);
+ }
+
+ for (int i = 0; i < 11; i++) {
+ add_port(new_cell, "RADDR_" + std::to_string(i), PORT_IN);
+ add_port(new_cell, "WADDR_" + std::to_string(i), PORT_IN);
+ }
} else if (type == "SB_GB") {
add_port(new_cell, "USER_SIGNAL_TO_GLOBAL_BUFFER", PORT_IN);
add_port(new_cell, "GLOBAL_BUFFER_OUTPUT", PORT_OUT);