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author | David Shah <davey1576@gmail.com> | 2018-07-19 13:22:46 +0200 |
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committer | David Shah <davey1576@gmail.com> | 2018-07-19 13:22:46 +0200 |
commit | 6c38df7295747ddd37a751ea5de2a73e95a021d1 (patch) | |
tree | b2087ea985ac3af13df594ae51b0b26db6783e97 /ice40/archdefs.h | |
parent | 0cb9ec0757c635982e0bd64f3e314786762c7483 (diff) | |
download | nextpnr-6c38df7295747ddd37a751ea5de2a73e95a021d1.tar.gz nextpnr-6c38df7295747ddd37a751ea5de2a73e95a021d1.tar.bz2 nextpnr-6c38df7295747ddd37a751ea5de2a73e95a021d1.zip |
ice40: Adding cell definition for DSPs
Signed-off-by: David Shah <davey1576@gmail.com>
Diffstat (limited to 'ice40/archdefs.h')
-rw-r--r-- | ice40/archdefs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/ice40/archdefs.h b/ice40/archdefs.h index cf8a78f4..55e2c2fb 100644 --- a/ice40/archdefs.h +++ b/ice40/archdefs.h @@ -54,7 +54,7 @@ enum BelType : int32_t TYPE_SB_GB, TYPE_ICESTORM_PLL, TYPE_SB_WARMBOOT, - TYPE_SB_MAC16, + TYPE_ICESTORM_DSP, TYPE_ICESTORM_HFOSC, TYPE_ICESTORM_LFOSC, TYPE_SB_I2C, |