aboutsummaryrefslogtreecommitdiffstats
path: root/ice40/arch.cc
diff options
context:
space:
mode:
authorD. Shah <dave@ds0.me>2021-02-08 11:24:00 +0000
committerD. Shah <dave@ds0.me>2021-02-08 11:24:00 +0000
commit0d444bfc6e073976e73840ac6647dd7adf0e243b (patch)
treea2c823ab4ad3b4f8df4a305d215f9274eb91b455 /ice40/arch.cc
parent8b4163b77c667c4f2a29e48adab96abc2a83b03d (diff)
downloadnextpnr-0d444bfc6e073976e73840ac6647dd7adf0e243b.tar.gz
nextpnr-0d444bfc6e073976e73840ac6647dd7adf0e243b.tar.bz2
nextpnr-0d444bfc6e073976e73840ac6647dd7adf0e243b.zip
Use RelSlice::ssize instead of cast-to-int throughout
Signed-off-by: D. Shah <dave@ds0.me>
Diffstat (limited to 'ice40/arch.cc')
-rw-r--r--ice40/arch.cc6
1 files changed, 3 insertions, 3 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc
index dd58361e..b7a87842 100644
--- a/ice40/arch.cc
+++ b/ice40/arch.cc
@@ -259,7 +259,7 @@ BelRange Arch::getBelsByTile(int x, int y) const
br.e.cursor = br.b.cursor;
if (br.e.cursor != -1) {
- while (br.e.cursor < int(chip_info->bel_data.size()) && chip_info->bel_data[br.e.cursor].x == x &&
+ while (br.e.cursor < chip_info->bel_data.ssize() && chip_info->bel_data[br.e.cursor].x == x &&
chip_info->bel_data[br.e.cursor].y == y)
br.e.cursor++;
}
@@ -376,7 +376,7 @@ WireId Arch::getWireByName(IdStringList name) const
WireId ret;
if (wire_by_name.empty()) {
- for (int i = 0; i < int(chip_info->wire_data.size()); i++) {
+ for (int i = 0; i < chip_info->wire_data.ssize(); i++) {
WireId w;
w.index = i;
wire_by_name[getWireName(w)] = i;
@@ -449,7 +449,7 @@ PipId Arch::getPipByName(IdStringList name) const
PipId ret;
if (pip_by_name.empty()) {
- for (int i = 0; i < int(chip_info->pip_data.size()); i++) {
+ for (int i = 0; i < chip_info->pip_data.ssize(); i++) {
PipId pip;
pip.index = i;
pip_by_name[getPipName(pip)] = i;