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| author | YRabbit <rabbit@yrabbit.cyou> | 2023-03-22 17:15:17 +1000 |
|---|---|---|
| committer | myrtle <gatecat@ds0.me> | 2023-03-23 12:37:53 +0100 |
| commit | 95ace0fade44633db7ea6d3d65702dc8a2d1d488 (patch) | |
| tree | b7afc4268d449e62ef5edb2fb7181654ed3b303c /gowin/cells.h | |
| parent | b3c33bd0ab3cd123aa73e9cb46dea41baadf6dd5 (diff) | |
| download | nextpnr-95ace0fade44633db7ea6d3d65702dc8a2d1d488.tar.gz nextpnr-95ace0fade44633db7ea6d3d65702dc8a2d1d488.tar.bz2 nextpnr-95ace0fade44633db7ea6d3d65702dc8a2d1d488.zip | |
gowin: Add support for OSER primitives
* placement of OSER4, OVIDEO, OSER8 and SER10 primitives is supported;
* primitives are implemented for the GW1N-1, GW1NZ-1, GW1NSR-4C,
GW1NR-9, GW1NR-9C chips;
* the initial support for special HCLK clock wires is implemented to the
extent necessary for OSER primitives to function;
* output to both regular IO and TLVDS_OBUF is supported;
* tricks required for IOLOGIC to work on one side of the -9 and -9C
chips are taken into account;
* various edits, such as using idf() instead of the local buffer.
Compatible with old apicula bases.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
Diffstat (limited to 'gowin/cells.h')
| -rw-r--r-- | gowin/cells.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gowin/cells.h b/gowin/cells.h index 7aba4805..4cabe086 100644 --- a/gowin/cells.h +++ b/gowin/cells.h @@ -105,7 +105,7 @@ inline bool is_lc(const BaseCtx *ctx, const CellInfo *cell) { return cell->type inline bool is_sram(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == id_RAM16SDP4; } -inline bool is_iob(const Context *ctx, const CellInfo *cell) { return (cell->type.index == ID_IOB); } +inline bool is_iob(const Context *ctx, const CellInfo *cell) { return (cell->type == id_IOB || cell->type == id_IOBS); } // Convert a LUT primitive to (part of) an GENERIC_SLICE, swapping ports // as needed. Set no_dff if a DFF is not being used, so that the output |