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authorYRabbit <rabbit@yrabbit.cyou>2023-03-22 17:15:17 +1000
committermyrtle <gatecat@ds0.me>2023-03-23 12:37:53 +0100
commit95ace0fade44633db7ea6d3d65702dc8a2d1d488 (patch)
treeb7afc4268d449e62ef5edb2fb7181654ed3b303c /gowin/cells.cc
parentb3c33bd0ab3cd123aa73e9cb46dea41baadf6dd5 (diff)
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gowin: Add support for OSER primitives
* placement of OSER4, OVIDEO, OSER8 and SER10 primitives is supported; * primitives are implemented for the GW1N-1, GW1NZ-1, GW1NSR-4C, GW1NR-9, GW1NR-9C chips; * the initial support for special HCLK clock wires is implemented to the extent necessary for OSER primitives to function; * output to both regular IO and TLVDS_OBUF is supported; * tricks required for IOLOGIC to work on one side of the -9 and -9C chips are taken into account; * various edits, such as using idf() instead of the local buffer. Compatible with old apicula bases. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
Diffstat (limited to 'gowin/cells.cc')
-rw-r--r--gowin/cells.cc4
1 files changed, 4 insertions, 0 deletions
diff --git a/gowin/cells.cc b/gowin/cells.cc
index c30a4706..436b4766 100644
--- a/gowin/cells.cc
+++ b/gowin/cells.cc
@@ -105,6 +105,10 @@ std::unique_ptr<CellInfo> create_generic_cell(Context *ctx, IdString type, std::
new_cell->addOutput(id_CLKOUTD);
new_cell->addOutput(id_CLKOUTD3);
new_cell->addOutput(id_LOCK);
+ } else if (type == id_IOLOGIC) {
+ new_cell->addInput(id_PCLK);
+ new_cell->addInput(id_RESET);
+ } else if (type == id_DUMMY_CELL) {
} else {
log_error("unable to create generic cell of type %s\n", type.c_str(ctx));
}