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| author | gatecat <gatecat@ds0.me> | 2022-02-18 12:07:49 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-02-18 12:07:49 +0000 |
| commit | 347ba3afb3f541edc594c8bc276cce481c7a7e03 (patch) | |
| tree | 28483964fb3c92bc104ab6162d1c9196651ced26 /gowin/arch.cc | |
| parent | 61d1db16be2c68cf6ae8b4d2ff3266b5c7086ad2 (diff) | |
| parent | 6a32aca4ac8705b637943c236cedd2f36422fb21 (diff) | |
| download | nextpnr-347ba3afb3f541edc594c8bc276cce481c7a7e03.tar.gz nextpnr-347ba3afb3f541edc594c8bc276cce481c7a7e03.tar.bz2 nextpnr-347ba3afb3f541edc594c8bc276cce481c7a7e03.zip | |
Merge pull request #919 from YosysHQ/gatecat/netlist-iii
refactor: New member functions to replace design_utils
Diffstat (limited to 'gowin/arch.cc')
| -rw-r--r-- | gowin/arch.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/gowin/arch.cc b/gowin/arch.cc index b104013d..af851467 100644 --- a/gowin/arch.cc +++ b/gowin/arch.cc @@ -1600,9 +1600,9 @@ void Arch::assignArchInfo() ci->is_slice = true; ci->ff_used = ci->params.at(id_FF_USED).as_bool(); ci->ff_type = id(ci->params.at(id_FF_TYPE).as_string()); - ci->slice_clk = get_net_or_empty(ci, id_CLK); - ci->slice_ce = get_net_or_empty(ci, id_CE); - ci->slice_lsr = get_net_or_empty(ci, id_LSR); + ci->slice_clk = ci->getPort(id_CLK); + ci->slice_ce = ci->getPort(id_CE); + ci->slice_lsr = ci->getPort(id_LSR); // add timing paths addCellTimingClock(cname, id_CLK); |