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| author | Miodrag Milanovic <mmicko@gmail.com> | 2019-12-28 13:54:06 +0100 |
|---|---|---|
| committer | Miodrag Milanovic <mmicko@gmail.com> | 2019-12-28 13:54:06 +0100 |
| commit | 796d6489953927105d3b0ed22308f29676b168fa (patch) | |
| tree | bc0f470642c0943713c441aa7c3e9e310cb23ccc /generic/examples/simple_timing.py | |
| parent | 50f87a6024859d197eefa8de0b0b616b1e03e239 (diff) | |
| parent | 0d43aff2682d91817ea4a1fb5dff6e169ae9a659 (diff) | |
| download | nextpnr-796d6489953927105d3b0ed22308f29676b168fa.tar.gz nextpnr-796d6489953927105d3b0ed22308f29676b168fa.tar.bz2 nextpnr-796d6489953927105d3b0ed22308f29676b168fa.zip | |
Merge remote-tracking branch 'origin/master' into mmicko/ecp5_gui
Diffstat (limited to 'generic/examples/simple_timing.py')
| -rw-r--r-- | generic/examples/simple_timing.py | 26 |
1 files changed, 12 insertions, 14 deletions
diff --git a/generic/examples/simple_timing.py b/generic/examples/simple_timing.py index 2ccb197e..1067b556 100644 --- a/generic/examples/simple_timing.py +++ b/generic/examples/simple_timing.py @@ -1,15 +1,13 @@ for cname, cell in ctx.cells: - if cell.type != "GENERIC_SLICE": - continue - if cname in ("$PACKER_GND", "$PACKER_VCC"): - continue - K = int(cell.params["K"]) - if int(cell.params["FF_USED"], 2) == 1: - ctx.addCellTimingClock(cell=cname, port="CLK") - for i in range(K): - ctx.addCellTimingSetupHold(cell=cname, port="I[%d]" % i, clock="CLK", - setup=ctx.getDelayFromNS(0.2), hold=ctx.getDelayFromNS(0)) - ctx.addCellTimingClockToOut(cell=cname, port="Q", clock="CLK", clktoq=ctx.getDelayFromNS(0.2)) - else: - for i in range(K): - ctx.addCellTimingDelay(cell=cname, fromPort="I[%d]" % i, toPort="Q", delay=ctx.getDelayFromNS(0.2))
\ No newline at end of file + if cell.type != "GENERIC_SLICE": + continue + if cname in ("$PACKER_GND", "$PACKER_VCC"): + continue + K = int(cell.params["K"]) + ctx.addCellTimingClock(cell=cname, port="CLK") + for i in range(K): + ctx.addCellTimingSetupHold(cell=cname, port="I[%d]" % i, clock="CLK", + setup=ctx.getDelayFromNS(0.2), hold=ctx.getDelayFromNS(0)) + ctx.addCellTimingClockToOut(cell=cname, port="Q", clock="CLK", clktoq=ctx.getDelayFromNS(0.2)) + for i in range(K): + ctx.addCellTimingDelay(cell=cname, fromPort="I[%d]" % i, toPort="F", delay=ctx.getDelayFromNS(0.2)) |