diff options
| author | gatecat <gatecat@ds0.me> | 2021-02-15 16:19:25 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-02-15 16:19:25 +0000 |
| commit | 9fc02041fe7bdcbac99e54f30423b2c39b92bb8a (patch) | |
| tree | 077d4bcba094cfd602ab5188e2fd05eaccf3cb2c /generic/archdefs.h | |
| parent | 065f46daeb05a8b12cc663a44410b6da27a8d9e3 (diff) | |
| parent | f0b2a91bdaf77eb1bdb0a47f5f342e98e8db38c9 (diff) | |
| download | nextpnr-9fc02041fe7bdcbac99e54f30423b2c39b92bb8a.tar.gz nextpnr-9fc02041fe7bdcbac99e54f30423b2c39b92bb8a.tar.bz2 nextpnr-9fc02041fe7bdcbac99e54f30423b2c39b92bb8a.zip | |
Merge pull request #584 from YosysHQ/gatecat/generic-belpin
Add bel pin mapping control to nextpnr-generic
Diffstat (limited to 'generic/archdefs.h')
| -rw-r--r-- | generic/archdefs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/generic/archdefs.h b/generic/archdefs.h index fad36894..30503414 100644 --- a/generic/archdefs.h +++ b/generic/archdefs.h @@ -68,6 +68,8 @@ struct ArchCellInfo bool is_slice; // Only packing rule for slice type primitives is a single clock per tile const NetInfo *slice_clk; + // Cell to bel pin mapping + std::unordered_map<IdString, std::vector<IdString>> bel_pins; }; NEXTPNR_NAMESPACE_END |