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| author | Alessandro Comodi <acomodi@antmicro.com> | 2021-05-10 18:53:30 +0200 |
|---|---|---|
| committer | Alessandro Comodi <acomodi@antmicro.com> | 2021-05-12 18:28:22 +0200 |
| commit | fd93697a2d4eca02fc5091a15a497f7a761f251a (patch) | |
| tree | 0465c31a4eeb0bee2ffc0c18c5ed99abfa56eb5a /fpga_interchange | |
| parent | ced31aa917d2b9da711f246815aae0d968b9365a (diff) | |
| download | nextpnr-fd93697a2d4eca02fc5091a15a497f7a761f251a.tar.gz nextpnr-fd93697a2d4eca02fc5091a15a497f7a761f251a.tar.bz2 nextpnr-fd93697a2d4eca02fc5091a15a497f7a761f251a.zip | |
interchange: arch: do not allow site pips within sites
During general routing, the only site pips that can be allowed are those
which connect a site wire to the routing interface.
This might be too restrictive when dealing with architectures that
require more than one site PIPs to route from a driver within a site to the routing
interface (which is something that should be allowed in the
interchange).
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
Diffstat (limited to 'fpga_interchange')
| -rw-r--r-- | fpga_interchange/arch.cc | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/fpga_interchange/arch.cc b/fpga_interchange/arch.cc index 602f3913..ad4d90e8 100644 --- a/fpga_interchange/arch.cc +++ b/fpga_interchange/arch.cc @@ -1805,12 +1805,6 @@ bool Arch::checkPipAvailForNet(PipId pip, NetInfo *net) const NPNR_ASSERT(src_wire_data.site == pip_data.site); valid_pip = true; } - - if (dst_wire_data.site == bel_data.site && src_wire_data.site == bel_data.site) { - // This is site pip for the same site as the driver, allow - // this site pip. - valid_pip = true; - } } } |