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authorKeith Rothman <537074+litghost@users.noreply.github.com>2021-01-26 10:05:23 -0800
committerKeith Rothman <537074+litghost@users.noreply.github.com>2021-02-04 16:38:32 -0800
commit561b519716e86576f500dc91b676aad6b6166afc (patch)
treee76767c01bf918ff96d8a37fdfd329be35675597 /fpga_interchange/fpga_interchange_archdefs.h
parentc99fbde0eb0b1b9b725ba2fead13d3210ce961a7 (diff)
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Initial FPGA interchange (which is just a cut-down xilinx arch).
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
Diffstat (limited to 'fpga_interchange/fpga_interchange_archdefs.h')
-rw-r--r--fpga_interchange/fpga_interchange_archdefs.h87
1 files changed, 87 insertions, 0 deletions
diff --git a/fpga_interchange/fpga_interchange_archdefs.h b/fpga_interchange/fpga_interchange_archdefs.h
new file mode 100644
index 00000000..5495505b
--- /dev/null
+++ b/fpga_interchange/fpga_interchange_archdefs.h
@@ -0,0 +1,87 @@
+#include <cstdint>
+
+typedef int delay_t;
+
+struct DelayInfo
+{
+ delay_t delay = 0;
+
+ delay_t minRaiseDelay() const { return delay; }
+ delay_t maxRaiseDelay() const { return delay; }
+
+ delay_t minFallDelay() const { return delay; }
+ delay_t maxFallDelay() const { return delay; }
+
+ delay_t minDelay() const { return delay; }
+ delay_t maxDelay() const { return delay; }
+
+ DelayInfo operator+(const DelayInfo &other) const
+ {
+ DelayInfo ret;
+ ret.delay = this->delay + other.delay;
+ return ret;
+ }
+};
+
+struct BelId
+{
+ // Tile that contains this BEL.
+ int32_t tile = -1;
+ // Index into tile type BEL array.
+ // BEL indicies are the same for all tiles of the same type.
+ int32_t index = -1;
+
+ bool operator==(const BelId &other) const { return tile == other.tile && index == other.index; }
+ bool operator!=(const BelId &other) const { return tile != other.tile || index != other.index; }
+ bool operator<(const BelId &other) const
+ {
+ return tile < other.tile || (tile == other.tile && index < other.index);
+ }
+};
+
+struct WireId
+{
+ // Tile that contains this wire.
+ int32_t tile = -1;
+ int32_t index = -1;
+
+ bool operator==(const WireId &other) const { return tile == other.tile && index == other.index; }
+ bool operator!=(const WireId &other) const { return tile != other.tile || index != other.index; }
+ bool operator<(const WireId &other) const
+ {
+ return tile < other.tile || (tile == other.tile && index < other.index);
+ }
+};
+
+struct PipId
+{
+ int32_t tile = -1;
+ int32_t index = -1;
+
+ bool operator==(const PipId &other) const { return tile == other.tile && index == other.index; }
+ bool operator!=(const PipId &other) const { return tile != other.tile || index != other.index; }
+ bool operator<(const PipId &other) const
+ {
+ return tile < other.tile || (tile == other.tile && index < other.index);
+ }
+};
+
+struct GroupId
+{
+};
+
+struct DecalId
+{
+};
+
+struct ArchNetInfo
+{
+};
+
+struct NetInfo
+{
+};
+
+struct ArchCellInfo
+{
+};