fpga_interchange: add more devices

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>

8 files changed, 91 insertions, 3 deletions

diff --git a/fpga_interchange/examples/devices/CMakeLists.txt b/fpga_interchange/examples/devices/CMakeLists.txt
index 5b96ac80..965e4aa8 100644
--- a/fpga_interchange/examples/devices/CMakeLists.txt
+++ b/fpga_interchange/examples/devices/CMakeLists.txt
@@ -1 +1,7 @@
+# Artix-7 devices
 add_subdirectory(xc7a35t)
+add_subdirectory(xc7a100t)
+add_subdirectory(xc7a200t)
+
+# Zynq-7 devices
+add_subdirectory(xc7z010)
diff --git a/fpga_interchange/examples/devices/xc7a100t/CMakeLists.txt b/fpga_interchange/examples/devices/xc7a100t/CMakeLists.txt
new file mode 100644
index 00000000..cc894634
--- /dev/null
+++ b/fpga_interchange/examples/devices/xc7a100t/CMakeLists.txt
@@ -0,0 +1,14 @@
+generate_xc7_device_db(
+    device xc7a100t
+    part xc7a100tcsg324-1
+    device_target xc7a100t_target
+)
+
+generate_chipdb(
+    family ${family}
+    device xc7a100t
+    part xc7a100tcsg324-1
+    device_target ${xc7a100t_target}
+    bel_bucket_seeds ${PYTHON_INTERCHANGE_PATH}/test_data/series7_bel_buckets.yaml
+    test_package csg324
+)
diff --git a/fpga_interchange/examples/devices/xc7a200t/CMakeLists.txt b/fpga_interchange/examples/devices/xc7a200t/CMakeLists.txt
new file mode 100644
index 00000000..f1c069ab
--- /dev/null
+++ b/fpga_interchange/examples/devices/xc7a200t/CMakeLists.txt
@@ -0,0 +1,14 @@
+generate_xc7_device_db(
+    device xc7a200t
+    part xc7a200tsbg484-1
+    device_target xc7a200t_target
+)
+
+generate_chipdb(
+    family ${family}
+    device xc7a200t
+    part xc7a200tsbg484-1
+    device_target ${xc7a200t_target}
+    bel_bucket_seeds ${PYTHON_INTERCHANGE_PATH}/test_data/series7_bel_buckets.yaml
+    test_package sbg484
+)
diff --git a/fpga_interchange/examples/devices/xc7z010/CMakeLists.txt b/fpga_interchange/examples/devices/xc7z010/CMakeLists.txt
new file mode 100644
index 00000000..c0ee37df
--- /dev/null
+++ b/fpga_interchange/examples/devices/xc7z010/CMakeLists.txt
@@ -0,0 +1,14 @@
+generate_xc7_device_db(
+    device xc7z010
+    part xc7z010clg400-1
+    device_target xc7z010_target
+)
+
+generate_chipdb(
+    family ${family}
+    device xc7z010
+    part xc7z010clg400-1
+    device_target ${xc7z010_target}
+    bel_bucket_seeds ${PYTHON_INTERCHANGE_PATH}/test_data/series7_bel_buckets.yaml
+    test_package clg400
+)
diff --git a/fpga_interchange/examples/tests/wire/CMakeLists.txt b/fpga_interchange/examples/tests/wire/CMakeLists.txt
index 59faf402..c7199475 100644
--- a/fpga_interchange/examples/tests/wire/CMakeLists.txt
+++ b/fpga_interchange/examples/tests/wire/CMakeLists.txt
@@ -9,7 +9,7 @@ add_interchange_test(
 )
 
 add_interchange_test(
-    name wire_arty
+    name wire_arty_35t
     family ${family}
     device xc7a35t
     package csg324
@@ -17,3 +17,33 @@ add_interchange_test(
     xdc wire_arty.xdc
     sources wire.v
 )
+
+add_interchange_test(
+    name wire_arty_100t
+    family ${family}
+    device xc7a100t
+    package csg324
+    tcl run.tcl
+    xdc wire_arty.xdc
+    sources wire.v
+)
+
+add_interchange_test(
+    name wire_nexys_video
+    family ${family}
+    device xc7a200t
+    package sbg484
+    tcl run.tcl
+    xdc wire_nexys_video.xdc
+    sources wire.v
+)
+
+add_interchange_test(
+    name wire_zybo
+    family ${family}
+    device xc7z010
+    package clg400
+    tcl run.tcl
+    xdc wire_zybo.xdc
+    sources wire.v
+)
diff --git a/fpga_interchange/examples/tests/wire/wire_arty.xdc b/fpga_interchange/examples/tests/wire/wire_arty.xdc
index c923f0fc..54c661c9 100644
--- a/fpga_interchange/examples/tests/wire/wire_arty.xdc
+++ b/fpga_interchange/examples/tests/wire/wire_arty.xdc
@@ -1,5 +1,5 @@
-set_property PACKAGE_PIN N16 [get_ports i]
-set_property PACKAGE_PIN N15 [get_ports o]
+set_property PACKAGE_PIN A8 [get_ports i]
+set_property PACKAGE_PIN H5 [get_ports o]
 
 set_property IOSTANDARD LVCMOS33 [get_ports i]
 set_property IOSTANDARD LVCMOS33 [get_ports o]
diff --git a/fpga_interchange/examples/tests/wire/wire_nexys_video.xdc b/fpga_interchange/examples/tests/wire/wire_nexys_video.xdc
new file mode 100644
index 00000000..326f77cb
--- /dev/null
+++ b/fpga_interchange/examples/tests/wire/wire_nexys_video.xdc
@@ -0,0 +1,5 @@
+set_property PACKAGE_PIN E22 [get_ports i]
+set_property PACKAGE_PIN T14 [get_ports o]
+
+set_property IOSTANDARD LVCMOS33 [get_ports i]
+set_property IOSTANDARD LVCMOS33 [get_ports o]
diff --git a/fpga_interchange/examples/tests/wire/wire_zybo.xdc b/fpga_interchange/examples/tests/wire/wire_zybo.xdc
new file mode 100644
index 00000000..072c19d2
--- /dev/null
+++ b/fpga_interchange/examples/tests/wire/wire_zybo.xdc
@@ -0,0 +1,5 @@
+set_property PACKAGE_PIN G15 [get_ports i]
+set_property PACKAGE_PIN M14 [get_ports o]
+
+set_property IOSTANDARD LVCMOS33 [get_ports i]
+set_property IOSTANDARD LVCMOS33 [get_ports o]