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| author | Alessandro Comodi <acomodi@antmicro.com> | 2021-06-30 18:43:15 +0200 |
|---|---|---|
| committer | Alessandro Comodi <acomodi@antmicro.com> | 2021-06-30 20:04:23 +0200 |
| commit | cfbd1dfa4d98256d378b57db310d87f07a9279de (patch) | |
| tree | 03a267d943669aa8fcb6fcc12aa61ec8e4673eb6 /fpga_interchange/dedicated_interconnect.cc | |
| parent | 152c41c3ac4541ddfa2147be1ac89f9d0eaf5c6e (diff) | |
| download | nextpnr-cfbd1dfa4d98256d378b57db310d87f07a9279de.tar.gz nextpnr-cfbd1dfa4d98256d378b57db310d87f07a9279de.tar.bz2 nextpnr-cfbd1dfa4d98256d378b57db310d87f07a9279de.zip | |
interchange: fix dedicated interconnect exploration
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
Diffstat (limited to 'fpga_interchange/dedicated_interconnect.cc')
| -rw-r--r-- | fpga_interchange/dedicated_interconnect.cc | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/fpga_interchange/dedicated_interconnect.cc b/fpga_interchange/dedicated_interconnect.cc index 6a2d16bb..1254b367 100644 --- a/fpga_interchange/dedicated_interconnect.cc +++ b/fpga_interchange/dedicated_interconnect.cc @@ -50,7 +50,7 @@ struct WireNode // // Routing networks with depth <= kMaxDepth is considers a dedicated // interconnect. -constexpr int kMaxDepth = 20; +constexpr int kMaxDepth = 6; void DedicatedInterconnect::init(const Context *ctx) { @@ -115,14 +115,14 @@ bool DedicatedInterconnect::check_routing(BelId src_bel, IdString src_bel_pin, B WireNode next_node; next_node.wire = wire; - next_node.depth = node_to_expand.depth += 1; + next_node.depth = node_to_expand.depth; - if (next_node.depth > kMaxDepth) { + if (node_to_expand.depth > kMaxDepth) { // Dedicated routing should reach sources by kMaxDepth (with // tuning). // // FIXME: Consider removing kMaxDepth and use kMaxSources? - return false; + continue; } auto const &wire_data = ctx->wire_info(wire); @@ -162,6 +162,8 @@ bool DedicatedInterconnect::check_routing(BelId src_bel, IdString src_bel_pin, B } } else { next_node.state = node_to_expand.state; + if (next_node.state == IN_ROUTING) + next_node.depth++; } if (expand_node) { @@ -580,9 +582,9 @@ void DedicatedInterconnect::expand_sink_bel(BelId sink_bel, IdString sink_pin, W WireNode next_node; next_node.wire = wire; - next_node.depth = node_to_expand.depth += 1; + next_node.depth = node_to_expand.depth; - if (next_node.depth > kMaxDepth) { + if (node_to_expand.depth > kMaxDepth) { // Dedicated routing should reach sources by kMaxDepth (with // tuning). // @@ -625,6 +627,8 @@ void DedicatedInterconnect::expand_sink_bel(BelId sink_bel, IdString sink_pin, W } } else { next_node.state = node_to_expand.state; + if (next_node.state == IN_ROUTING) + next_node.depth++; } if (expand_node) { @@ -723,9 +727,9 @@ void DedicatedInterconnect::expand_source_bel(BelId src_bel, IdString src_pin, W WireNode next_node; next_node.wire = wire; - next_node.depth = node_to_expand.depth += 1; + next_node.depth = node_to_expand.depth; - if (next_node.depth > kMaxDepth) { + if (node_to_expand.depth > kMaxDepth) { // Dedicated routing should reach sources by kMaxDepth (with // tuning). // @@ -768,6 +772,8 @@ void DedicatedInterconnect::expand_source_bel(BelId src_bel, IdString src_pin, W } } else { next_node.state = node_to_expand.state; + if (next_node.state == IN_ROUTING) + next_node.depth++; } if (expand_node) { |