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authorDavid Shah <dave@ds0.me>2019-09-13 18:24:38 +0100
committerGitHub <noreply@github.com>2019-09-13 18:24:38 +0100
commit3975424ff544406915a9e995ef14a0b060b30661 (patch)
treec2f9f614d548d21ff4abd18d7cd92d6decc5d855 /ecp5
parent927077e03b2e71649a0d691dee8d09bfdf085146 (diff)
parent9e8976996e576414ac3402b8efa63cd7bd1a89bb (diff)
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Merge pull request #328 from YosysHQ/dave/timing_iobuf
Move clock constraints across buffers in more cases
Diffstat (limited to 'ecp5')
-rw-r--r--ecp5/pack.cc9
1 files changed, 9 insertions, 0 deletions
diff --git a/ecp5/pack.cc b/ecp5/pack.cc
index e610dfe5..509d33f3 100644
--- a/ecp5/pack.cc
+++ b/ecp5/pack.cc
@@ -377,6 +377,13 @@ class Ecp5Packer
log_error("Pin B of %s '%s' connected to more than a single top level IO.\n",
trio->type.c_str(ctx), trio->name.c_str(ctx));
if (net != nullptr) {
+ if (net->clkconstr != nullptr && trio->ports.count(ctx->id("O"))) {
+ NetInfo *onet = trio->ports.at(ctx->id("O")).net;
+ if (onet != nullptr && !onet->clkconstr) {
+ // Move clock constraint from IO pad to input buffer output
+ std::swap(net->clkconstr, onet->clkconstr);
+ }
+ }
ctx->nets.erase(net->name);
trio->ports.at(ctx->id("B")).net = nullptr;
}
@@ -2361,6 +2368,8 @@ class Ecp5Packer
copy_constraint(ci, id_CLKI, id_CDIVX, ratio);
} else if (ci->type == id_ECLKSYNCB || ci->type == id_TRELLIS_ECLKBUF) {
copy_constraint(ci, id_ECLKI, id_ECLKO, 1);
+ } else if (ci->type == id_DCCA) {
+ copy_constraint(ci, id_CLKI, id_CLKO, 1);
} else if (ci->type == id_EHXPLLL) {
delay_t period_in;
if (!get_period(ci, id_CLKI, period_in))