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| author | Miodrag Milanovic <mmicko@gmail.com> | 2019-12-20 09:07:03 +0100 |
|---|---|---|
| committer | Miodrag Milanovic <mmicko@gmail.com> | 2019-12-20 09:07:03 +0100 |
| commit | c26c5e7b8e9ea5a43ee9a5096dde340c945617b2 (patch) | |
| tree | 548bfed7bc17e2bb599ba2b1cdda23d5766e8a64 /ecp5/synth | |
| parent | e4210e7fd31981270c488d64e884a461e039c7d3 (diff) | |
| download | nextpnr-c26c5e7b8e9ea5a43ee9a5096dde340c945617b2.tar.gz nextpnr-c26c5e7b8e9ea5a43ee9a5096dde340c945617b2.tar.bz2 nextpnr-c26c5e7b8e9ea5a43ee9a5096dde340c945617b2.zip | |
clang format
Diffstat (limited to 'ecp5/synth')
| -rw-r--r-- | ecp5/synth/top.lpf | 132 |
1 files changed, 132 insertions, 0 deletions
diff --git a/ecp5/synth/top.lpf b/ecp5/synth/top.lpf new file mode 100644 index 00000000..dddc9552 --- /dev/null +++ b/ecp5/synth/top.lpf @@ -0,0 +1,132 @@ +BLOCK RESETPATHS; +BLOCK ASYNCPATHS; +LOCATE COMP "serial_tx" SITE "L4"; +IOBUF PORT "serial_tx" IO_TYPE=LVCMOS33; +LOCATE COMP "serial_rx" SITE "M1"; +IOBUF PORT "serial_rx" IO_TYPE=LVCMOS33; +LOCATE COMP "clk25" SITE "G2"; +IOBUF PORT "clk25" IO_TYPE=LVCMOS33; +LOCATE COMP "rst" SITE "R1"; +IOBUF PORT "rst" IO_TYPE=LVCMOS33; +LOCATE COMP "sdram_clock" SITE "F19"; +IOBUF PORT "sdram_clock" IO_TYPE=LVCMOS33; +LOCATE COMP "wifi_gpio0" SITE "L2"; +IOBUF PORT "wifi_gpio0" IO_TYPE=LVCMOS33; +LOCATE COMP "sdram_a[0]" SITE "M20"; +IOBUF PORT "sdram_a[0]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_a[0]" SLEWRATE=FAST; +LOCATE COMP "sdram_a[1]" SITE "M19"; +IOBUF PORT "sdram_a[1]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_a[1]" SLEWRATE=FAST; +LOCATE COMP "sdram_a[2]" SITE "L20"; +IOBUF PORT "sdram_a[2]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_a[2]" SLEWRATE=FAST; +LOCATE COMP "sdram_a[3]" SITE "L19"; +IOBUF PORT "sdram_a[3]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_a[3]" SLEWRATE=FAST; +LOCATE COMP "sdram_a[4]" SITE "K20"; +IOBUF PORT "sdram_a[4]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_a[4]" SLEWRATE=FAST; +LOCATE COMP "sdram_a[5]" SITE "K19"; +IOBUF PORT "sdram_a[5]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_a[5]" SLEWRATE=FAST; +LOCATE COMP "sdram_a[6]" SITE "K18"; +IOBUF PORT "sdram_a[6]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_a[6]" SLEWRATE=FAST; +LOCATE COMP "sdram_a[7]" SITE "J20"; +IOBUF PORT "sdram_a[7]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_a[7]" SLEWRATE=FAST; +LOCATE COMP "sdram_a[8]" SITE "J19"; +IOBUF PORT "sdram_a[8]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_a[8]" SLEWRATE=FAST; +LOCATE COMP "sdram_a[9]" SITE "H20"; +IOBUF PORT "sdram_a[9]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_a[9]" SLEWRATE=FAST; +LOCATE COMP "sdram_a[10]" SITE "N19"; +IOBUF PORT "sdram_a[10]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_a[10]" SLEWRATE=FAST; +LOCATE COMP "sdram_a[11]" SITE "G20"; +IOBUF PORT "sdram_a[11]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_a[11]" SLEWRATE=FAST; +LOCATE COMP "sdram_a[12]" SITE "G19"; +IOBUF PORT "sdram_a[12]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_a[12]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[0]" SITE "J16"; +IOBUF PORT "sdram_dq[0]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[0]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[1]" SITE "L18"; +IOBUF PORT "sdram_dq[1]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[1]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[2]" SITE "M18"; +IOBUF PORT "sdram_dq[2]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[2]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[3]" SITE "N18"; +IOBUF PORT "sdram_dq[3]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[3]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[4]" SITE "P18"; +IOBUF PORT "sdram_dq[4]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[4]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[5]" SITE "T18"; +IOBUF PORT "sdram_dq[5]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[5]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[6]" SITE "T17"; +IOBUF PORT "sdram_dq[6]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[6]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[7]" SITE "U20"; +IOBUF PORT "sdram_dq[7]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[7]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[8]" SITE "E19"; +IOBUF PORT "sdram_dq[8]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[8]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[9]" SITE "D20"; +IOBUF PORT "sdram_dq[9]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[9]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[10]" SITE "D19"; +IOBUF PORT "sdram_dq[10]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[10]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[11]" SITE "C20"; +IOBUF PORT "sdram_dq[11]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[11]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[12]" SITE "E18"; +IOBUF PORT "sdram_dq[12]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[12]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[13]" SITE "F18"; +IOBUF PORT "sdram_dq[13]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[13]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[14]" SITE "J18"; +IOBUF PORT "sdram_dq[14]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[14]" SLEWRATE=FAST; +LOCATE COMP "sdram_dq[15]" SITE "J17"; +IOBUF PORT "sdram_dq[15]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dq[15]" SLEWRATE=FAST; +LOCATE COMP "sdram_we_n" SITE "T20"; +IOBUF PORT "sdram_we_n" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_we_n" SLEWRATE=FAST; +LOCATE COMP "sdram_ras_n" SITE "R20"; +IOBUF PORT "sdram_ras_n" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_ras_n" SLEWRATE=FAST; +LOCATE COMP "sdram_cas_n" SITE "T19"; +IOBUF PORT "sdram_cas_n" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_cas_n" SLEWRATE=FAST; +LOCATE COMP "sdram_cs_n" SITE "P20"; +IOBUF PORT "sdram_cs_n" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_cs_n" SLEWRATE=FAST; +LOCATE COMP "sdram_cke" SITE "F20"; +IOBUF PORT "sdram_cke" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_cke" SLEWRATE=FAST; +LOCATE COMP "sdram_ba[0]" SITE "P19"; +IOBUF PORT "sdram_ba[0]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_ba[0]" SLEWRATE=FAST; +LOCATE COMP "sdram_ba[1]" SITE "N20"; +IOBUF PORT "sdram_ba[1]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_ba[1]" SLEWRATE=FAST; +LOCATE COMP "sdram_dm[0]" SITE "U19"; +IOBUF PORT "sdram_dm[0]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dm[0]" SLEWRATE=FAST; +LOCATE COMP "sdram_dm[1]" SITE "E20"; +IOBUF PORT "sdram_dm[1]" IO_TYPE=LVCMOS33; +IOBUF PORT "sdram_dm[1]" SLEWRATE=FAST; + +FREQUENCY PORT "clk25" 25.0 MHz; + +FREQUENCY PORT "clk25" 25.0 MHz;
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