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author | David Shah <dave@ds0.me> | 2019-11-26 16:10:07 +0000 |
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committer | David Shah <dave@ds0.me> | 2019-11-26 16:10:53 +0000 |
commit | 98fe4438f18bc48558f403ebd2d4e80e0989b5c0 (patch) | |
tree | 913689e34a71f161baacd5b29fe2450e80180185 /docs | |
parent | 08cf545d9b8b32eda7998261bdc8a5401432112c (diff) | |
download | nextpnr-98fe4438f18bc48558f403ebd2d4e80e0989b5c0.tar.gz nextpnr-98fe4438f18bc48558f403ebd2d4e80e0989b5c0.tar.bz2 nextpnr-98fe4438f18bc48558f403ebd2d4e80e0989b5c0.zip |
ECP5 support is no longer experimental
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'docs')
-rw-r--r-- | docs/faq.md | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/docs/faq.md b/docs/faq.md index 7b358187..8a102af8 100644 --- a/docs/faq.md +++ b/docs/faq.md @@ -144,8 +144,7 @@ Nextpnr and other tools migrating to nextpnr. * If you are developing Verilog FPGA code targeted at the Lattice ECP5 and - need an open source toolchain, you may consider the **extremely - experimental** ECP5 support in Yosys and nextpnr. + need an open source toolchain, there is also stable ECP5 support in Yosys and nextpnr. * If you are developing FPGA code in **VHDL** you will need to use either a version of [Yosys with Verific support](https://github.com/YosysHQ/yosys/tree/master/frontends/verific) or the vendor provided tools due |