Merge pull request #308 from YosysHQ/ecp5_ooc

Add out-of-context mode to ECP5 architecture

2 files changed, 24 insertions, 2 deletions

diff --git a/common/nextpnr.cc b/common/nextpnr.cc
index 0d89b55a..ab4601a6 100644
--- a/common/nextpnr.cc
+++ b/common/nextpnr.cc
@@ -294,6 +294,9 @@ delay_t Context::getNetinfoRouteDelay(const NetInfo *net_info, const PortRef &us
             break;
 
         PipId pip = it->second.pip;
+        if (pip == PipId())
+            break;
+
         delay += getPipDelay(pip).maxDelay();
         delay += getWireDelay(cursor).maxDelay();
         cursor = getPipSrcWire(pip);
@@ -571,6 +574,16 @@ void BaseCtx::attributesToArchInfo()
             BelId b = getCtx()->getBelByName(id(val->second.as_string()));
             getCtx()->bindBel(b, ci, strength);
         }
+
+        val = ci->attrs.find(id("CONSTR_PARENT"));
+        if (val != ci->attrs.end()) {
+            auto parent = cells.find(id(val->second.str));
+            if (parent != cells.end())
+                ci->constr_parent = parent->second.get();
+            else
+                continue;
+        }
+
         val = ci->attrs.find(id("CONSTR_X"));
         if (val != ci->attrs.end())
             ci->constr_x = val->second.as_int64();
@@ -599,7 +612,8 @@ void BaseCtx::attributesToArchInfo()
             auto children = val->second.as_string();
             boost::split(strs, children, boost::is_any_of(";"));
             for (auto val : strs) {
-                ci->constr_children.push_back(cells.find(id(val.c_str()))->second.get());
+                if (cells.count(id(val.c_str())))
+                    ci->constr_children.push_back(cells.find(id(val.c_str()))->second.get());
             }
         }
     }
diff --git a/common/timing.cc b/common/timing.cc
index 599d6dbd..37600c8c 100644
--- a/common/timing.cc
+++ b/common/timing.cc
@@ -185,8 +185,16 @@ struct Timing
             }
         }
 
-        std::deque<NetInfo *> queue(topographical_order.begin(), topographical_order.end());
+        // In out-of-context mode, handle top-level ports correctly
+        if (bool_or_default(ctx->settings, ctx->id("arch.ooc"))) {
+            for (auto &p : ctx->ports) {
+                if (p.second.type != PORT_IN || p.second.net == nullptr)
+                    continue;
+                topographical_order.emplace_back(p.second.net);
+            }
+        }
 
+        std::deque<NetInfo *> queue(topographical_order.begin(), topographical_order.end());
         // Now walk the design, from the start points identified previously, building up a topographical order
         while (!queue.empty()) {
             const auto net = queue.front();