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author | Clifford Wolf <clifford@clifford.at> | 2018-11-10 23:50:49 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2018-11-10 23:50:49 +0100 |
commit | 5b8c8bb966f7d4d2e7fe97137834a75b4e141d2e (patch) | |
tree | 71fb404c493e85efea0a15e7117a55c7c7aa18c5 /common | |
parent | d904a3713800409f376b78021b7d890c7c5f505f (diff) | |
download | nextpnr-5b8c8bb966f7d4d2e7fe97137834a75b4e141d2e.tar.gz nextpnr-5b8c8bb966f7d4d2e7fe97137834a75b4e141d2e.tar.bz2 nextpnr-5b8c8bb966f7d4d2e7fe97137834a75b4e141d2e.zip |
Some router1 cleanups
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'common')
-rw-r--r-- | common/router1.cc | 51 |
1 files changed, 39 insertions, 12 deletions
diff --git a/common/router1.cc b/common/router1.cc index 958edf7d..cac60104 100644 --- a/common/router1.cc +++ b/common/router1.cc @@ -649,7 +649,9 @@ bool router1(Context *ctx, const Router1Cfg &cfg) router.arcs_without_ripup - last_arcs_without_ripup, int(router.arc_queue.size())); last_arcs_with_ripup = router.arcs_with_ripup; last_arcs_without_ripup = router.arcs_without_ripup; +#ifndef NDEBUG router.check(); +#endif } arc_key arc = router.arc_queue_pop(); @@ -669,18 +671,17 @@ bool router1(Context *ctx, const Router1Cfg &cfg) iter_cnt, router.arcs_with_ripup, router.arcs_without_ripup, router.arcs_with_ripup - last_arcs_with_ripup, router.arcs_without_ripup - last_arcs_without_ripup, int(router.arc_queue.size())); -#ifndef NDEBUG - router.check(); -#endif - log_info("Routing complete.\n"); - ctx->checkRoutedDesign(); - log_info("Checksum: 0x%08x\n", ctx->checksum()); #ifndef NDEBUG + router.check(); ctx->check(); + log_assert(ctx->checkRoutedDesign()); #endif + + log_info("Checksum: 0x%08x\n", ctx->checksum()); timing_analysis(ctx, true /* slack_histogram */, true /* print_path */); + ctx->unlock(); return true; } catch (log_execution_error_exception) { @@ -772,9 +773,11 @@ bool Context::checkRoutedDesign() const } if (db_entry.children.empty()) { if (dest_wires.count(w) != 0) { - log(" %*s=> sink %d\n", 2*num, "", dest_wires.at(w)); + if (ctx->debug) + log(" %*s=> sink %d\n", 2*num, "", dest_wires.at(w)); } else { - log(" %*s=> stub\n", 2*num, ""); + if (ctx->debug) + log(" %*s=> stub\n", 2*num, ""); found_stub = true; } } @@ -820,10 +823,34 @@ bool Context::checkRoutedDesign() const } } - log_assert(!found_unrouted); - log_assert(!found_loop); - log_assert(!found_stub); - log_assert(dangling_wires.empty()); + bool fail = false; + + if (found_unrouted) { + if (ctx->debug) + log("check failed: found unrouted arcs\n"); + fail = true; + } + + if (found_loop) { + if (ctx->debug) + log("check failed: found loops\n"); + fail = true; + } + + if (found_stub) { + if (ctx->debug) + log("check failed: found stubs\n"); + fail = true; + } + + if (!dangling_wires.empty()) { + if (ctx->debug) + log("check failed: found dangling wires\n"); + fail = true; + } + + if (fail) + return false; } return true; |