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author | Clifford Wolf <clifford@clifford.at> | 2018-11-09 12:57:14 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2018-11-09 12:57:14 +0100 |
commit | 66dd17664c08aca17b53d2853558121aa9e702e4 (patch) | |
tree | b6bc5dd919e5f525ec7328861b81f616673a1ea6 /common/timing.cc | |
parent | e91241f10d68fcaaf0a81fa77e9a91666120ccee (diff) | |
parent | 15d9b3d3cc05656e58d01ba2f97ec92b6daaee1c (diff) | |
download | nextpnr-66dd17664c08aca17b53d2853558121aa9e702e4.tar.gz nextpnr-66dd17664c08aca17b53d2853558121aa9e702e4.tar.bz2 nextpnr-66dd17664c08aca17b53d2853558121aa9e702e4.zip |
Merge branch 'master' of github.com:YosysHQ/nextpnr into router_improve
Diffstat (limited to 'common/timing.cc')
-rw-r--r-- | common/timing.cc | 39 |
1 files changed, 22 insertions, 17 deletions
diff --git a/common/timing.cc b/common/timing.cc index 62697353..d1a85779 100644 --- a/common/timing.cc +++ b/common/timing.cc @@ -48,6 +48,7 @@ struct Timing delay_t max_arrival; unsigned max_path_length = 0; delay_t min_remaining_budget; + bool false_startpoint = false; }; Timing(Context *ctx, bool net_delays, bool update, PortRefVector *crit_path = nullptr, @@ -93,12 +94,11 @@ struct Timing topographical_order.emplace_back(o->net); net_data.emplace(o->net, TimingData{clkToQ.maxDelay()}); } else { - // TODO(eddieh): Generated clocks and ignored ports are currently added into the ordering as if it - // was a regular timing start point in order to enable the full topographical order to be computed, - // however these false nets (and their downstream paths) should not be in the final ordering if (portClass == TMG_STARTPOINT || portClass == TMG_GEN_CLOCK || portClass == TMG_IGNORE) { topographical_order.emplace_back(o->net); - net_data.emplace(o->net, TimingData{}); + TimingData td; + td.false_startpoint = (portClass == TMG_GEN_CLOCK || portClass == TMG_IGNORE); + net_data.emplace(o->net, std::move(td)); } // Otherwise, for all driven input ports on this cell, if a timing arc exists between the input and // the current output port, increment fanin counter @@ -112,19 +112,6 @@ struct Timing } } - // If these constant nets exist, add them to the topographical ordering too - // TODO(eddieh): Also false paths and should be removed from ordering - auto it = ctx->nets.find(ctx->id("$PACKER_VCC_NET")); - if (it != ctx->nets.end()) { - topographical_order.emplace_back(it->second.get()); - net_data.emplace(it->second.get(), TimingData{}); - } - it = ctx->nets.find(ctx->id("$PACKER_GND_NET")); - if (it != ctx->nets.end()) { - topographical_order.emplace_back(it->second.get()); - net_data.emplace(it->second.get(), TimingData{}); - } - std::deque<NetInfo *> queue(topographical_order.begin(), topographical_order.end()); // Now walk the design, from the start points identified previously, building up a topographical order @@ -164,6 +151,22 @@ struct Timing } // Sanity check to ensure that all ports where fanins were recorded were indeed visited + if (!port_fanin.empty()) { + for (auto fanin : port_fanin) { + NetInfo *net = fanin.first->net; + if (net != nullptr) { + log_info(" remaining fanin includes %s (net %s)\n", fanin.first->name.c_str(ctx), + net->name.c_str(ctx)); + if (net->driver.cell != nullptr) + log_info(" driver = %s.%s\n", net->driver.cell->name.c_str(ctx), + net->driver.port.c_str(ctx)); + for (auto net_user : net->users) + log_info(" user: %s.%s\n", net_user.cell->name.c_str(ctx), net_user.port.c_str(ctx)); + } else { + log_info(" remaining fanin includes %s (no net)\n", fanin.first->name.c_str(ctx)); + } + } + } NPNR_ASSERT(port_fanin.empty()); // Go forwards topographically to find the maximum arrival time and max path length for each net @@ -208,6 +211,8 @@ struct Timing // between all nets on the path for (auto net : boost::adaptors::reverse(topographical_order)) { auto &nd = net_data.at(net); + // Ignore false startpoints + if (nd.false_startpoint) continue; const delay_t net_length_plus_one = nd.max_path_length + 1; auto &net_min_remaining_budget = nd.min_remaining_budget; for (auto &usr : net->users) { |