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| author | YRabbit <rabbit@yrabbit.cyou> | 2023-01-31 08:58:33 +1000 |
|---|---|---|
| committer | YRabbit <rabbit@yrabbit.cyou> | 2023-01-31 08:58:33 +1000 |
| commit | aac36ecf3f5869498876fda03d9e5f0a2ab9f2a3 (patch) | |
| tree | d40db4dad61fa0786c01c5ea019c683815aa941d | |
| parent | 2829a7d70af7a4cc32173cced2ebd5cb5e46cb93 (diff) | |
| download | nextpnr-aac36ecf3f5869498876fda03d9e5f0a2ab9f2a3.tar.gz nextpnr-aac36ecf3f5869498876fda03d9e5f0a2ab9f2a3.tar.bz2 nextpnr-aac36ecf3f5869498876fda03d9e5f0a2ab9f2a3.zip | |
gowin: Add PLL support for GW1NR-4 chips
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
| -rw-r--r-- | gowin/arch.cc | 6 | ||||
| -rw-r--r-- | gowin/pack.cc | 2 |
2 files changed, 6 insertions, 2 deletions
diff --git a/gowin/arch.cc b/gowin/arch.cc index 1574eee3..734ff911 100644 --- a/gowin/arch.cc +++ b/gowin/arch.cc @@ -2123,11 +2123,15 @@ void Arch::bind_pll_to_bel(CellInfo *ci, PLL loc) bel = id("R1C18_rPLL"); break; } + if (family == "GW1N-4") { + bel = loc == PLL::left ? id("R1C10_rPLL") : id("R1C28_rPLL"); + break; + } if (family == "GW1NR-9C" || family == "GW1NR-9") { bel = loc == PLL::left ? id("R10C1_rPLL") : id("R10C47_rPLL"); break; } - break; + return; default: return; } diff --git a/gowin/pack.cc b/gowin/pack.cc index 09e5c880..bed0a8df 100644 --- a/gowin/pack.cc +++ b/gowin/pack.cc @@ -1044,7 +1044,7 @@ static void pack_plls(Context *ctx) switch (ci->type.hash()) { case ID_rPLL: { if (parm_device == "GW1N-1" || parm_device == "GW1NZ-1" || parm_device == "GW1NR-9C" || - parm_device == "GW1NR-9") { + parm_device == "GW1NR-9" || parm_device == "GW1N-4") { pll_disable_unused_ports(ctx, ci); // A cell std::unique_ptr<CellInfo> cell = create_generic_cell(ctx, id_rPLL, ci->name.str(ctx) + "$rpll"); |