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| author | Pepijn de Vos <pepijndevos@gmail.com> | 2019-11-08 17:18:50 +0100 |
|---|---|---|
| committer | Pepijn de Vos <pepijndevos@gmail.com> | 2019-11-08 17:18:50 +0100 |
| commit | a4848f6902f81b6d3f2a36ab853922047e177288 (patch) | |
| tree | 3e58a81c1406fa195b8db814b124626dd2b6c926 | |
| parent | 5dd1e5e51e65d1efdd2f84c10a2b751e3228b982 (diff) | |
| download | nextpnr-a4848f6902f81b6d3f2a36ab853922047e177288.tar.gz nextpnr-a4848f6902f81b6d3f2a36ab853922047e177288.tar.bz2 nextpnr-a4848f6902f81b6d3f2a36ab853922047e177288.zip | |
more formatting
| -rw-r--r-- | generic/synth/prims.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/generic/synth/prims.v b/generic/synth/prims.v index acce585c..1148041c 100644 --- a/generic/synth/prims.v +++ b/generic/synth/prims.v @@ -21,11 +21,11 @@ endmodule module GENERIC_SLICE #( parameter K = 4, parameter [2**K-1:0] INIT = 0, - parameter FF_USED = 1'b0 + parameter FF_USED = 1'b0 ) ( input CLK, input [K-1:0] I, - output F, + output F, output Q ); wire f_wire; |