diff options
| -rw-r--r-- | docs/ultraplus.html | 8 | ||||
| -rw-r--r-- | icebox/icebox.py | 13 |
2 files changed, 20 insertions, 1 deletions
diff --git a/docs/ultraplus.html b/docs/ultraplus.html index 694b82d..dac648a 100644 --- a/docs/ultraplus.html +++ b/docs/ultraplus.html @@ -205,6 +205,14 @@ The <span style="font-family:monospace">CLKHF</span> output of SB_HFOSC is conne <p>Configuration bit <span style="font-family:monospace">CLKHF_DIV[1]</span> maps to DSP1 tile (0, 16) config bit <span style="font-family:monospace">CBIT_4</span>, and <span style="font-family:monospace">CLKHF_DIV[0]</span> maps to DSP1 tile (0, 16) config bit <span style="font-family:monospace">CBIT_3</span>.</p> +<p>There is also an undocumented trimming function of the HFOSC, using the ports <span style="font-family:monospace">TRIM0</span> through <span style="font-family:monospace">TRIM9</span>. This can only be accessed directly in iCECUBE if you modify the standard cell library. However + if you set the attribute <span style="font-family:monospace">VPP_2V5_TO_1P8V</span> (which itself is not that well documented either) to 1 on the top level module, then the configuration bit + <span style="font-family:monospace">CBIT_5</span> of (0, 16) is set; and <span style="font-family:monospace">TRIM8</span> and <span style="font-family:monospace">TRIM4</span> are connected to + the same net as <span style="font-family:monospace">CLKHFPU</span>.</p> +<p><span style="font-family:monospace">TRIM[3:0]</span> connect to <span style="font-family:monospace">(25, 28, lutff_[7:4]/in_0)</span> and <span style="font-family:monospace">TRIM[9:4]</span> + connect to <span style="font-family:monospace">(25, 29, lutff_[5:0]/in_3)</span>. <span style="font-family:monospace">CBIT_5</span> of (0, 16) must be set to enable trimming. The trim range +on the device used for testing was from 30.1 to 75.9 MHz. TRIM9 seemed to have no effect, the other inputs could broadly be considered to form a binary word, however it appeared neither linear +nor even monotonic.</p> <h3>SB_LFOSC</h3> <p>The <span style="font-family:monospace">CLKLFPU</span> input connects through IPConnect tile (25, 29) input <span style="font-family:monospace">lutff_0/in_1</span>; and the <span style="font-family:monospace">CLKLFEN</span> input connects through input <span style="font-family:monospace">lutff_7/in_3</span> of the same tile.<br/> diff --git a/icebox/icebox.py b/icebox/icebox.py index ed27d1b..331aa74 100644 --- a/icebox/icebox.py +++ b/icebox/icebox.py @@ -4695,8 +4695,19 @@ extra_cells_db = { "CLKHFEN": (0, 29, "lutff_7/in_3"), "CLKHF": (0, 29, "glb_netwk_4"), "CLKHF_FABRIC": (0, 28, "slf_op_7"), + "TRIM0": (25, 28, "lutff_4/in_0"), + "TRIM1": (25, 28, "lutff_5/in_0"), + "TRIM2": (25, 28, "lutff_6/in_0"), + "TRIM3": (25, 28, "lutff_7/in_0"), + "TRIM4": (25, 29, "lutff_0/in_3"), + "TRIM5": (25, 29, "lutff_1/in_3"), + "TRIM6": (25, 29, "lutff_2/in_3"), + "TRIM7": (25, 29, "lutff_3/in_3"), + "TRIM8": (25, 29, "lutff_4/in_3"), + "TRIM9": (25, 29, "lutff_5/in_3"), "CLKHF_DIV_1": (0, 16, "CBIT_4"), - "CLKHF_DIV_0": (0, 16, "CBIT_3") + "CLKHF_DIV_0": (0, 16, "CBIT_3"), + "TRIM_EN": (0, 16, "CBIT_5") }, ("LFOSC", (25, 31, 1)) : { "CLKLFPU": (25, 29, "lutff_0/in_1"), |