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author | Clifford Wolf <clifford@clifford.at> | 2017-03-08 13:40:35 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2017-03-08 13:40:35 +0100 |
commit | 4a4be48c34b69bffe41abd14c0fda7b0f8684837 (patch) | |
tree | d375fefdde40024875239f8a2cfff76e25bfd910 /icefuzz | |
parent | de563bdd958573837529d49bddc0dfa68c55fe75 (diff) | |
parent | 038bf76caae3840a91720af6b1fe832a0d73f7bb (diff) | |
download | icestorm-4a4be48c34b69bffe41abd14c0fda7b0f8684837.tar.gz icestorm-4a4be48c34b69bffe41abd14c0fda7b0f8684837.tar.bz2 icestorm-4a4be48c34b69bffe41abd14c0fda7b0f8684837.zip |
Merge branch 'hermitsoft'
Diffstat (limited to 'icefuzz')
-rw-r--r-- | icefuzz/Makefile | 30 | ||||
-rw-r--r-- | icefuzz/cached_io.txt | 36 | ||||
-rw-r--r-- | icefuzz/extract.py | 5 | ||||
-rw-r--r-- | icefuzz/fuzzconfig.py | 12 | ||||
-rw-r--r-- | icefuzz/icecube.sh | 17 | ||||
-rw-r--r-- | icefuzz/make_fanout.py | 15 | ||||
-rw-r--r-- | icefuzz/make_fflogic.py | 9 | ||||
-rw-r--r-- | icefuzz/make_gbio.py | 32 | ||||
-rw-r--r-- | icefuzz/make_gbio2.py | 26 | ||||
-rw-r--r-- | icefuzz/make_io.py | 30 | ||||
-rw-r--r-- | icefuzz/make_logic.py | 16 | ||||
-rw-r--r-- | icefuzz/make_mesh.py | 13 | ||||
-rw-r--r-- | icefuzz/make_prim.py | 22 | ||||
-rw-r--r-- | icefuzz/pinloc/pinloc-384-qn32.sh | 42 | ||||
-rw-r--r-- | icefuzz/timings_lp384.txt | 252 | ||||
-rw-r--r-- | icefuzz/tmedges.txt | 2 |
16 files changed, 488 insertions, 71 deletions
diff --git a/icefuzz/Makefile b/icefuzz/Makefile index a90a0bb..ff576d1 100644 --- a/icefuzz/Makefile +++ b/icefuzz/Makefile @@ -2,6 +2,9 @@ include ../config.mk export LC_ALL=C export ICE_SBTIMER_LP=1 +#EIGTHK = _8k +THREEH = _384 + TESTS = TESTS += binop TESTS += pin2pin @@ -15,12 +18,12 @@ TESTS += gbio TESTS += gbio2 TESTS += prim TESTS += fflogic -TESTS += ram40 -TESTS += mem -TESTS += pll -TESTS += aig - -EIGTHK = _8k +ifneq ($(THREEH),_384) + TESTS += ram40 + TESTS += mem + TESTS += pll + TESTS += aig +endif database: bitdata_io.txt bitdata_logic.txt bitdata_ramb$(EIGTHK).txt bitdata_ramt$(EIGTHK).txt ifeq ($(EIGTHK),_8k) @@ -49,6 +52,13 @@ ifeq ($(EIGTHK),_8k) python3 timings.py -t timings_lp8k.txt work_*/*.slp > timings_lp8k.new mv timings_lp8k.new timings_lp8k.txt else + ifeq ($(THREEH),_384) + cp tmedges.txt tmedges.tmp + set -e; for f in work_*/*.vsb; do echo $$f; yosys -q -f verilog -s tmedges.ys $$f; done + sort -u tmedges.tmp > tmedges.txt && rm -f tmedges.tmp + python3 timings.py -t timings_lp384.txt work_*/*.slp > timings_lp384.new + mv timings_lp384.new timings_lp384.txt + else cp tmedges.txt tmedges.tmp set -e; for f in work_*/*.vsb; do echo $$f; yosys -q -f verilog -s tmedges.ys $$f; done sort -u tmedges.tmp > tmedges.txt && rm -f tmedges.tmp @@ -56,6 +66,7 @@ else mv timings_hx1k.new timings_hx1k.txt python3 timings.py -t timings_lp1k.txt work_*/*.slp > timings_lp1k.new mv timings_lp1k.new timings_lp1k.txt + endif endif timings_html: @@ -63,6 +74,7 @@ timings_html: python3 timings.py -h tmedges.txt -t timings_hx8k.txt -l "HX8K with default temp/volt settings" > timings_hx8k.html python3 timings.py -h tmedges.txt -t timings_lp1k.txt -l "LP1K with default temp/volt settings" > timings_lp1k.html python3 timings.py -h tmedges.txt -t timings_lp8k.txt -l "LP8K with default temp/volt settings" > timings_lp8k.html + python3 timings.py -h tmedges.txt -t timings_lp384.txt -l "LP384 with default temp/volt settings" > timings_lp384.html data_cached.txt: cached_io.txt cached_logic.txt cached_ramb$(EIGTHK).txt cached_ramt$(EIGTHK).txt gawk '{ print "io", $$0; }' cached_io.txt > data_cached.new @@ -95,9 +107,15 @@ ifeq ($(EIGTHK),_8k) +ICEDEV=hx8k-ct256 $(MAKE) -C work_$(1) python3 extract.py -8 work_$(1)/*.glb > $$@ else + ifeq ($(THREEH),_384) + ICE384PINS=1 python3 make_$(1).py + +ICEDEV=lp384-qn32 $(MAKE) -C work_$(1) + python3 extract.py -3 work_$(1)/*.glb > $$@ + else python3 make_$(1).py +$(MAKE) -C work_$(1) python3 extract.py work_$(1)/*.glb > $$@ + endif endif endef diff --git a/icefuzz/cached_io.txt b/icefuzz/cached_io.txt index fee8758..82343c6 100644 --- a/icefuzz/cached_io.txt +++ b/icefuzz/cached_io.txt @@ -527,19 +527,27 @@ (2 6) IO control bit: BIODOWN_REN_0 (2 6) IO control bit: BIOLEFT_REN_0 (2 6) IO control bit: BIORIGHT_REN_0 +(2 6) IO control bit: BIORIGHT_REN_1 (2 6) IO control bit: BIOUP_REN_0 (2 6) IO control bit: GIODOWN0_REN_0 (2 6) IO control bit: GIODOWN1_REN_0 (2 6) IO control bit: GIOLEFT0_REN_0 +(2 6) IO control bit: GIOLEFT0_REN_1 (2 6) IO control bit: GIOLEFT1_REN_0 +(2 6) IO control bit: GIOLEFT1_REN_1 (2 6) IO control bit: GIORIGHT0_REN_0 (2 6) IO control bit: GIORIGHT1_REN_0 +(2 6) IO control bit: GIORIGHT1_REN_1 (2 6) IO control bit: GIOUP0_REN_0 (2 6) IO control bit: GIOUP1_REN_0 +(2 6) IO control bit: GIOUP1_REN_1 (2 6) IO control bit: IODOWN_REN_0 +(2 6) IO control bit: IODOWN_REN_1 (2 6) IO control bit: IOLEFT_REN_0 +(2 6) IO control bit: IOLEFT_REN_1 (2 6) IO control bit: IORIGHT_REN_0 (2 6) IO control bit: IOUP_REN_0 +(2 6) IO control bit: IOUP_REN_1 (2 7) Enable bit of Mux _out_links/OutMux9_1 => wire_io_cluster/io_0/D_IN_1 span4_horz_r_13 (2 7) Enable bit of Mux _out_links/OutMux9_1 => wire_io_cluster/io_0/D_IN_1 span4_vert_b_13 (2 8) IO control bit: BIOLEFT_LVDS_en @@ -557,19 +565,29 @@ (3 0) PLL config bit: CLOCK_T_18_33_IOUP_cf_bit_2 (3 1) IO control bit: BIODOWN_REN_1 (3 1) IO control bit: BIOLEFT_REN_1 +(3 1) IO control bit: BIORIGHT_REN_0 (3 1) IO control bit: BIORIGHT_REN_1 +(3 1) IO control bit: BIOUP_REN_0 (3 1) IO control bit: BIOUP_REN_1 (3 1) IO control bit: GIODOWN0_REN_1 (3 1) IO control bit: GIODOWN1_REN_1 +(3 1) IO control bit: GIOLEFT0_REN_0 (3 1) IO control bit: GIOLEFT0_REN_1 +(3 1) IO control bit: GIOLEFT1_REN_0 (3 1) IO control bit: GIOLEFT1_REN_1 +(3 1) IO control bit: GIORIGHT0_REN_0 (3 1) IO control bit: GIORIGHT0_REN_1 +(3 1) IO control bit: GIORIGHT1_REN_0 (3 1) IO control bit: GIORIGHT1_REN_1 +(3 1) IO control bit: GIOUP0_REN_0 (3 1) IO control bit: GIOUP0_REN_1 (3 1) IO control bit: GIOUP1_REN_1 +(3 1) IO control bit: IODOWN_REN_0 (3 1) IO control bit: IODOWN_REN_1 +(3 1) IO control bit: IOLEFT_REN_0 (3 1) IO control bit: IOLEFT_REN_1 (3 1) IO control bit: IORIGHT_REN_1 +(3 1) IO control bit: IOUP_REN_0 (3 1) IO control bit: IOUP_REN_1 (3 11) Icegate Enable bit: GIODOWN0_padin_latch_enable (3 11) Icegate Enable bit: GIODOWN1_padin_latch_enable @@ -616,19 +634,29 @@ (3 5) PLL config bit: CLOCK_T_17_0_IODOWN_cf_bit_6 (3 6) IO control bit: BIODOWN_IE_1 (3 6) IO control bit: BIOLEFT_IE_1 +(3 6) IO control bit: BIORIGHT_IE_0 (3 6) IO control bit: BIORIGHT_IE_1 +(3 6) IO control bit: BIOUP_IE_0 (3 6) IO control bit: BIOUP_IE_1 (3 6) IO control bit: GIODOWN0_IE_1 (3 6) IO control bit: GIODOWN1_IE_1 +(3 6) IO control bit: GIOLEFT0_IE_0 (3 6) IO control bit: GIOLEFT0_IE_1 +(3 6) IO control bit: GIOLEFT1_IE_0 (3 6) IO control bit: GIOLEFT1_IE_1 +(3 6) IO control bit: GIORIGHT0_IE_0 (3 6) IO control bit: GIORIGHT0_IE_1 +(3 6) IO control bit: GIORIGHT1_IE_0 (3 6) IO control bit: GIORIGHT1_IE_1 +(3 6) IO control bit: GIOUP0_IE_0 (3 6) IO control bit: GIOUP0_IE_1 (3 6) IO control bit: GIOUP1_IE_1 +(3 6) IO control bit: IODOWN_IE_0 (3 6) IO control bit: IODOWN_IE_1 +(3 6) IO control bit: IOLEFT_IE_0 (3 6) IO control bit: IOLEFT_IE_1 (3 6) IO control bit: IORIGHT_IE_1 +(3 6) IO control bit: IOUP_IE_0 (3 6) IO control bit: IOUP_IE_1 (3 7) PLL config bit: CLOCK_T_0_1_IOLEFT_cf_bit_9 (3 7) PLL config bit: CLOCK_T_0_2_IOLEFT_cf_bit_9 @@ -641,19 +669,27 @@ (3 9) IO control bit: BIODOWN_IE_0 (3 9) IO control bit: BIOLEFT_IE_0 (3 9) IO control bit: BIORIGHT_IE_0 +(3 9) IO control bit: BIORIGHT_IE_1 (3 9) IO control bit: BIOUP_IE_0 (3 9) IO control bit: GIODOWN0_IE_0 (3 9) IO control bit: GIODOWN1_IE_0 (3 9) IO control bit: GIOLEFT0_IE_0 +(3 9) IO control bit: GIOLEFT0_IE_1 (3 9) IO control bit: GIOLEFT1_IE_0 +(3 9) IO control bit: GIOLEFT1_IE_1 (3 9) IO control bit: GIORIGHT0_IE_0 (3 9) IO control bit: GIORIGHT1_IE_0 +(3 9) IO control bit: GIORIGHT1_IE_1 (3 9) IO control bit: GIOUP0_IE_0 (3 9) IO control bit: GIOUP1_IE_0 +(3 9) IO control bit: GIOUP1_IE_1 (3 9) IO control bit: IODOWN_IE_0 +(3 9) IO control bit: IODOWN_IE_1 (3 9) IO control bit: IOLEFT_IE_0 +(3 9) IO control bit: IOLEFT_IE_1 (3 9) IO control bit: IORIGHT_IE_0 (3 9) IO control bit: IOUP_IE_0 +(3 9) IO control bit: IOUP_IE_1 (4 0) routing IO_B.logic_op_tnl_0 <X> lc_trk_g0_0 (4 0) routing IO_B.logic_op_top_0 <X> lc_trk_g0_0 (4 0) routing IO_L.logic_op_rgt_0 <X> lc_trk_g0_0 diff --git a/icefuzz/extract.py b/icefuzz/extract.py index 3da4b40..1ffac8a 100644 --- a/icefuzz/extract.py +++ b/icefuzz/extract.py @@ -5,6 +5,7 @@ import sys, re db = set() text_db = dict() mode_8k = False +mode_384 = False cur_text_db = None max_x, max_y = 0, 0 @@ -12,6 +13,10 @@ if sys.argv[1] == '-8': sys.argv = sys.argv[1:] mode_8k = True +if sys.argv[1] == '-3': + sys.argv = sys.argv[1:] + mode_384 = True + for filename in sys.argv[1:]: with open(filename, "r") as f: for line in f: diff --git a/icefuzz/fuzzconfig.py b/icefuzz/fuzzconfig.py index bcd4e5d..6bb1338 100644 --- a/icefuzz/fuzzconfig.py +++ b/icefuzz/fuzzconfig.py @@ -26,6 +26,18 @@ if os.getenv('ICE8KPINS'): gpins = "C8 F7 G1 H11 H16 I3 K9 R9".split() +elif os.getenv('ICE384PINS'): + num_ramb40 = 0 + + pins = """ + 1 2 5 6 7 8 + 12 13 14 15 + 18 19 20 22 23 + 26 27 29 30 31 32 + """.split() + + gpins = "6 8 19 20 29 30".split() + else: num_ramb40 = 16 diff --git a/icefuzz/icecube.sh b/icefuzz/icecube.sh index 2154b87..ed847a9 100644 --- a/icefuzz/icecube.sh +++ b/icefuzz/icecube.sh @@ -10,7 +10,7 @@ # - <project_name>.pcf ## physical constraint file # # Running iCEcube2: -# - bash icecube.sh [-1k|-8k] <project_name> ## creates <project_name>.bin +# - bash icecube.sh [-1k|-8k|-384] <project_name> ## creates <project_name>.bin # # # @@ -41,6 +41,11 @@ if [ "$1" == "-8k" ]; then shift fi +if [ "$1" == "-384" ]; then + ICEDEV=384-qn32 + shift +fi + if [ "$1" == "-ul1k" ]; then ICEDEV=ul1k-cm36a shift @@ -92,6 +97,10 @@ case "${ICEDEV:-hx1k-tq144}" in iCEPACKAGE="CB132" iCE40DEV="iCE40HX8K" ;; + lp384-qn32) + iCEPACKAGE="QN32" + iCE40DEV="iCE40LP384" + ;; lp1k-swg16tr) iCEPACKAGE="SWG16TR" iCE40DEV="iCE40LP1K" @@ -177,6 +186,11 @@ case "$iCE40DEV" in libfile="ice40HX8K.lib" devfile="ICE40P08.dev" ;; + iCE40LP384) + icetech="SBTiCE40" + libfile="ice40LP384.lib" + devfile="ICE40P03.dev" + ;; iCE40LP1K) icetech="SBTiCE40" libfile="ice40LP1K.lib" @@ -380,5 +394,6 @@ if [ -n "$ICE_SBTIMER_LP" ]; then cp "$1.tmp"/outputs/netlist/top_timing_lp.rpt "$1.rlp" fi +export LD_LIBRARY_PATH="" $scriptdir/../icepack/iceunpack "$1.bin" "$1.asc" diff --git a/icefuzz/make_fanout.py b/icefuzz/make_fanout.py index 9df56c7..1102cc0 100644 --- a/icefuzz/make_fanout.py +++ b/icefuzz/make_fanout.py @@ -9,15 +9,20 @@ os.mkdir("work_fanout") for idx in range(num): with open("work_fanout/fanout_%02d.v" % idx, "w") as f: - print("module top(input [1:0] a, output [63:0] y);", file=f) - print(" assign y = {32{a}};", file=f) + if os.getenv('ICE384PINS'): + print("module top(input [1:0] a, output [15:0] y);", file=f) + print(" assign y = {8{a}};", file=f) + else: + print("module top(input [1:0] a, output [63:0] y);", file=f) + print(" assign y = {32{a}};", file=f) print("endmodule", file=f) with open("work_fanout/fanout_%02d.pcf" % idx, "w") as f: p = np.random.permutation(pins) - for i in range(64): + r = 16 if os.getenv('ICE384PINS') else 64 + for i in range(r): print("set_io y[%d] %s" % (i, p[i]), file=f) - print("set_io a[0] %s" % p[64], file=f) - print("set_io a[1] %s" % p[65], file=f) + print("set_io a[0] %s" % p[r], file=f) + print("set_io a[1] %s" % p[r+1], file=f) with open("work_fanout/Makefile", "w") as f: print("all: %s" % " ".join(["fanout_%02d.bin" % i for i in range(num)]), file=f) diff --git a/icefuzz/make_fflogic.py b/icefuzz/make_fflogic.py index bcd7111..ecca7ca 100644 --- a/icefuzz/make_fflogic.py +++ b/icefuzz/make_fflogic.py @@ -37,8 +37,13 @@ def print_seq_op(dst, src1, src2, op, f): for idx in range(num): with open("work_fflogic/fflogic_%02d.v" % idx, "w") as f: - print("module top(input clk, rst, en, input [15:0] a, b, c, d, output [15:0] y, output z);", file=f) - print(" reg [15:0] p, q;", file=f) + if os.getenv('ICE384PINS'): + print("module top(input clk, rst, en, input [1:0] a, b, c, d, output [1:0] y, output z);", file=f) + print(" reg [1:0] p, q;", file=f) + else: + print("module top(input clk, rst, en, input [15:0] a, b, c, d, output [15:0] y, output z);", file=f) + print(" reg [15:0] p, q;", file=f) + print_seq_op("p", "a", "b", random_op(), f) print_seq_op("q", "c", "d", random_op(), f) print(" assign y = p %s q, z = clk ^ rst ^ en;" % random_op(), file=f) diff --git a/icefuzz/make_gbio.py b/icefuzz/make_gbio.py index a6cbf0a..9d740d1 100644 --- a/icefuzz/make_gbio.py +++ b/icefuzz/make_gbio.py @@ -7,6 +7,8 @@ import os os.system("rm -rf work_gbio") os.mkdir("work_gbio") +w = 2 if os.getenv('ICE384PINS') else 8 + for p in gpins: if p in pins: pins.remove(p) @@ -15,7 +17,7 @@ for idx in range(num): glbs = np.random.permutation(list(range(8))) print(""" module top ( - inout [7:0] pin, + inout [%s:0] pin, input latch_in, input clk_en, input clk_in, @@ -23,9 +25,9 @@ for idx in range(num): input oen, input dout_0, input dout_1, - output [7:0] din_0, - output [7:0] din_1, - output [7:0] globals, + output [%s:0] din_0, + output [%s:0] din_1, + output [%s:0] globals, output reg q ); SB_GB_IO #( @@ -33,7 +35,7 @@ for idx in range(num): .PULLUP(1'b0), .NEG_TRIGGER(1'b0), .IO_STANDARD("SB_LVCMOS") - ) PINS [7:0] ( + ) PINS [%s:0] ( .PACKAGE_PIN(pin), .LATCH_INPUT_VALUE(%s), .CLOCK_ENABLE(%s), @@ -54,6 +56,7 @@ for idx in range(num): q <= globals[%d]; endmodule """ % ( + w-1, w-1, w-1, w-1, w-1, np.random.choice(["latch_in", "globals", "din_0+din_1", "din_0^din_1"]), np.random.choice(["clk_en", "globals", "din_0+din_1", "din_0^din_1"]), np.random.choice(["clk_in", "globals", "din_0+din_1", "din_0^din_1"]), @@ -61,21 +64,24 @@ for idx in range(num): np.random.choice(["oen", "globals", "din_0+din_1", "din_0^din_1"]), np.random.choice(["dout_1", "globals", "globals^dout_0", "din_0+din_1", "~din_0"]), np.random.choice(["dout_0", "globals", "globals^dout_1", "din_0+din_1", "~din_1"]), - np.random.choice(["din_0", "{din_0[3:0], din_0[7:4]}"]), - np.random.choice(["din_1", "{din_1[1:0], din_1[7:2]}"]), - np.random.choice(["globals", "{globals[0], globals[7:1]}"]), + np.random.choice(["din_0", "{din_0[0], din_0[1]}"]) if os.getenv('ICE384PINS') + else np.random.choice(["din_0", "{din_0[3:0], din_0[7:4]}"]) , + np.random.choice(["din_1", "{din_1[0], din_1[1]}"]) if os.getenv('ICE384PINS') + else np.random.choice(["din_1", "{din_1[1:0], din_1[7:2]}"]), + np.random.choice(["globals", "{globals[0], globals[1]}"]) if os.getenv('ICE384PINS') + else np.random.choice(["globals", "{globals[0], globals[7:1]}"]), glbs[0], glbs[1], glbs[1], glbs[2], glbs[3] ), file=f) with open("work_gbio/gbio_%02d.pcf" % idx, "w") as f: p = np.random.permutation(pins) g = np.random.permutation(gpins) - for i in range(8): + for i in range(w): print("set_io pin[%d] %s" % (i, g[i]), file=f) - print("set_io din_0[%d] %s" % (i, p[8+i]), file=f) - print("set_io din_1[%d] %s" % (i, p[2*8+i]), file=f) - print("set_io globals[%d] %s" % (i, p[3*8+i]), file=f) + print("set_io din_0[%d] %s" % (i, p[w+i]), file=f) + print("set_io din_1[%d] %s" % (i, p[2*w+i]), file=f) + print("set_io globals[%d] %s" % (i, p[3*w+i]), file=f) for i, n in enumerate("latch_in clk_en clk_in clk_out oen dout_0 dout_1".split()): - print("set_io %s %s" % (n, p[4*8+i]), file=f) + print("set_io %s %s" % (n, p[4*w+i]), file=f) print("set_io q %s" % (p[-1]), file=f) with open("work_gbio/Makefile", "w") as f: diff --git a/icefuzz/make_gbio2.py b/icefuzz/make_gbio2.py index 90832b3..8e44756 100644 --- a/icefuzz/make_gbio2.py +++ b/icefuzz/make_gbio2.py @@ -7,6 +7,8 @@ import os os.system("rm -rf work_gbio2") os.mkdir("work_gbio2") +w = 2 if os.getenv('ICE384PINS') else 8 + for p in gpins: if p in pins: pins.remove(p) @@ -15,7 +17,7 @@ for idx in range(num): glbs = np.random.permutation(list(range(8))) print(""" module top ( - inout [7:0] pin, + inout [%s:0] pin, input latch_in, input clk_en, input clk_in, @@ -23,13 +25,15 @@ for idx in range(num): input oen, input dout_0, input dout_1, - output [7:0] din_0, - output [7:0] din_1, - output [7:0] globals, + output [%s:0] din_0, + output [%s:0] din_1, + output [%s:0] globals, output reg q ); - """, file=f); - for k in range(8): + """ % ( + w-1, w-1, w-1, w-1 + ), file=f); + for k in range(w): print(""" SB_GB_IO #( .PIN_TYPE(6'b %s), @@ -68,13 +72,13 @@ for idx in range(num): with open("work_gbio2/gbio2_%02d.pcf" % idx, "w") as f: p = np.random.permutation(pins) g = np.random.permutation(gpins) - for i in range(8): + for i in range(w): print("set_io pin[%d] %s" % (i, g[i]), file=f) - print("set_io din_0[%d] %s" % (i, p[8+i]), file=f) - print("set_io din_1[%d] %s" % (i, p[2*8+i]), file=f) - print("set_io globals[%d] %s" % (i, p[3*8+i]), file=f) + print("set_io din_0[%d] %s" % (i, p[w+i]), file=f) + print("set_io din_1[%d] %s" % (i, p[2*w+i]), file=f) + print("set_io globals[%d] %s" % (i, p[3*w+i]), file=f) for i, n in enumerate("latch_in clk_en clk_in clk_out oen dout_0 dout_1".split()): - print("set_io %s %s" % (n, p[4*8+i]), file=f) + print("set_io %s %s" % (n, p[4*w+i]), file=f) print("set_io q %s" % (p[-1]), file=f) with open("work_gbio2/Makefile", "w") as f: diff --git a/icefuzz/make_io.py b/icefuzz/make_io.py index 89d8f22..aefabae 100644 --- a/icefuzz/make_io.py +++ b/icefuzz/make_io.py @@ -7,28 +7,31 @@ import os os.system("rm -rf work_io") os.mkdir("work_io") +if os.getenv('ICE384PINS'): w = 2 +else: w = 4 + for idx in range(num): with open("work_io/io_%02d.v" % idx, "w") as f: glbs = np.random.permutation(list(range(8))) print(""" module top ( - inout [3:0] pin, - input [3:0] latch_in, - input [3:0] clk_en, - input [3:0] clk_in, - input [3:0] clk_out, - input [3:0] oen, - input [3:0] dout_0, - input [3:0] dout_1, - output [3:0] din_0, - output [3:0] din_1 + inout [%s:0] pin, + input [%s:0] latch_in, + input [%s:0] clk_en, + input [%s:0] clk_in, + input [%s:0] clk_out, + input [%s:0] oen, + input [%s:0] dout_0, + input [%s:0] dout_1, + output [%s:0] din_0, + output [%s:0] din_1 ); SB_IO #( .PIN_TYPE(6'b %s_%s), .PULLUP(1'b %s), .NEG_TRIGGER(1'b %s), .IO_STANDARD("SB_LVCMOS") - ) PINS [3:0] ( + ) PINS [%s:0] ( .PACKAGE_PIN(pin), .LATCH_INPUT_VALUE(latch_in), .CLOCK_ENABLE(clk_en), @@ -42,13 +45,14 @@ for idx in range(num): ); endmodule """ % ( + w-1, w-1, w-1, w-1, w-1, w-1, w-1, w-1, w-1, w-1, np.random.choice(["0000", "0110", "1010", "1110", "0101", "1001", "1101", "0100", "1000", "1100", "0111", "1111"]), - np.random.choice(["00", "01", "10", "11"]), np.random.choice(["0", "1"]), np.random.choice(["0", "1"]) + np.random.choice(["00", "01", "10", "11"]), np.random.choice(["0", "1"]), np.random.choice(["0", "1"]), w-1 ), file=f) with open("work_io/io_%02d.pcf" % idx, "w") as f: p = list(np.random.permutation(pins)) for k in ["pin", "latch_in", "clk_en", "clk_in", "clk_out", "oen", "dout_0", "dout_1", "din_0", "din_1"]: - for i in range(4): + for i in range(w): print("set_io %s[%d] %s" % (k, i, p.pop()), file=f) with open("work_io/Makefile", "w") as f: diff --git a/icefuzz/make_logic.py b/icefuzz/make_logic.py index 846647d..37aa16c 100644 --- a/icefuzz/make_logic.py +++ b/icefuzz/make_logic.py @@ -12,17 +12,21 @@ def random_op(): for idx in range(num): with open("work_logic/logic_%02d.v" % idx, "w") as f: - print("module top(input [15:0] a, b, c, d, output [15:0] y);", file=f) + if os.getenv('ICE384PINS'): + print("module top(input [3:0] a, b, c, d, output [3:0] y);", file=f) + else: + print("module top(input [15:0] a, b, c, d, output [15:0] y);", file=f) print(" assign y = (a %s b) %s (c %s d);" % (random_op(), random_op(), random_op()), file=f) print("endmodule", file=f) with open("work_logic/logic_%02d.pcf" % idx, "w") as f: p = np.random.permutation(pins) - for i in range(16): + r = 4 if os.getenv('ICE384PINS') else 16 + for i in range(r): print("set_io a[%d] %s" % (i, p[i]), file=f) - print("set_io b[%d] %s" % (i, p[i+16]), file=f) - print("set_io c[%d] %s" % (i, p[i+32]), file=f) - print("set_io d[%d] %s" % (i, p[i+48]), file=f) - print("set_io y[%d] %s" % (i, p[i+64]), file=f) + print("set_io b[%d] %s" % (i, p[i+r]), file=f) + print("set_io c[%d] %s" % (i, p[i+r*2]), file=f) + print("set_io d[%d] %s" % (i, p[i+r*3]), file=f) + print("set_io y[%d] %s" % (i, p[i+r*4]), file=f) with open("work_logic/Makefile", "w") as f: print("all: %s" % " ".join(["logic_%02d.bin" % i for i in range(num)]), file=f) diff --git a/icefuzz/make_mesh.py b/icefuzz/make_mesh.py index 96e6044..1a69ca4 100644 --- a/icefuzz/make_mesh.py +++ b/icefuzz/make_mesh.py @@ -9,15 +9,20 @@ os.mkdir("work_mesh") for idx in range(num): with open("work_mesh/mesh_%02d.v" % idx, "w") as f: - print("module top(input [39:0] a, output [39:0] y);", file=f) + if os.getenv('ICE384PINS'): + print("module top(input [9:0] a, output [9:0] y);", file=f) + else: + print("module top(input [39:0] a, output [39:0] y);", file=f) print(" assign y = a;", file=f) print("endmodule", file=f) with open("work_mesh/mesh_%02d.pcf" % idx, "w") as f: p = np.random.permutation(pins) - for i in range(40): + if os.getenv('ICE384PINS'): r = 10 + else: r = 40 + for i in range(r): print("set_io a[%d] %s" % (i, p[i]), file=f) - for i in range(40): - print("set_io y[%d] %s" % (i, p[40+i]), file=f) + for i in range(r): + print("set_io y[%d] %s" % (i, p[r+i]), file=f) with open("work_mesh/Makefile", "w") as f: print("all: %s" % " ".join(["mesh_%02d.bin" % i for i in range(num)]), file=f) diff --git a/icefuzz/make_prim.py b/icefuzz/make_prim.py index 130feec..02a6534 100644 --- a/icefuzz/make_prim.py +++ b/icefuzz/make_prim.py @@ -7,11 +7,13 @@ import os os.system("rm -rf work_prim") os.mkdir("work_prim") +w = 5 if os.getenv('ICE384PINS') else 24 + for idx in range(num): with open("work_prim/prim_%02d.v" % idx, "w") as f: clkedge = np.random.choice(["pos", "neg"]) - print("module top(input clk, input [23:0] a, b, output reg x, output reg [23:0] y);", file=f) - print(" reg [23:0] aa, bb;", file=f) + print("module top(input clk, input [%s:0] a, b, output reg x, output reg [%s:0] y);""" % ( w-1, w-1 ), file=f) + print(" reg [%s:0] aa, bb;""" % ( w-1 ), file=f) print(" always @(%sedge clk) aa <= a;" % clkedge, file=f) print(" always @(%sedge clk) bb <= b;" % clkedge, file=f) if np.random.choice([True, False]): @@ -26,20 +28,20 @@ for idx in range(num): with open("work_prim/prim_%02d.pcf" % idx, "w") as f: p = np.random.permutation(pins) if np.random.choice([True, False]): - for i in range(24): + for i in range(w): print("set_io a[%d] %s" % (i, p[i]), file=f) if np.random.choice([True, False]): - for i in range(24): - print("set_io b[%d] %s" % (i, p[24+i]), file=f) + for i in range(w): + print("set_io b[%d] %s" % (i, p[w+i]), file=f) if np.random.choice([True, False]): - for i in range(24): - print("set_io y[%d] %s" % (i, p[2*24+i]), file=f) + for i in range(w): + print("set_io y[%d] %s" % (i, p[2*w+i]), file=f) if np.random.choice([True, False]): - print("set_io x %s" % p[3*24], file=f) + print("set_io x %s" % p[3*w], file=f) if np.random.choice([True, False]): - print("set_io y %s" % p[3*24+1], file=f) + print("set_io y %s" % p[3*w+1], file=f) if np.random.choice([True, False]): - print("set_io clk %s" % p[3*24+2], file=f) + print("set_io clk %s" % p[3*w+2], file=f) with open("work_prim/Makefile", "w") as f: print("all: %s" % " ".join(["prim_%02d.bin" % i for i in range(num)]), file=f) diff --git a/icefuzz/pinloc/pinloc-384-qn32.sh b/icefuzz/pinloc/pinloc-384-qn32.sh new file mode 100644 index 0000000..a3d91e4 --- /dev/null +++ b/icefuzz/pinloc/pinloc-384-qn32.sh @@ -0,0 +1,42 @@ +#!/bin/bash + +mkdir -p pinloc-384-qn32 +cd pinloc-384-qn32 + +pins=" + 1 2 5 6 7 8 + 12 13 14 15 + 18 19 20 22 23 + 26 27 29 30 31 32 +" + +if [ $(echo $pins | wc -w) -ne 21 ]; then + echo "Incorrect number of pins:" $(echo $pins | wc -w) + exit 1 +fi + +{ + echo -n "all:" + for pin in $pins; do + id="pinloc-384-qn32_${pin}" + echo -n " ${id}.exp" + done + echo + + for pin in $pins; do + id="pinloc-384-qn32_${pin}" + echo "module top(output y); assign y = 0; endmodule" > ${id}.v + echo "set_io y ${pin}" >> ${id}.pcf + echo; echo "${id}.exp:" + echo " ICEDEV=384-qn32 bash ../../icecube.sh ${id} > ${id}.log 2>&1" + echo " ../../../icebox/icebox_explain.py ${id}.asc > ${id}.exp.new" + echo " ! grep '^Warning: pin' ${id}.log" + echo " rm -rf ${id}.tmp" + echo " mv ${id}.exp.new ${id}.exp" + done +} > pinloc-384-qn32.mk + +set -ex +make -f pinloc-384-qn32.mk -j4 +python3 ../pinlocdb.py pinloc-384-qn32_*.exp > ../pinloc-384-qn32.txt + diff --git a/icefuzz/timings_lp384.txt b/icefuzz/timings_lp384.txt new file mode 100644 index 0000000..50e98fa --- /dev/null +++ b/icefuzz/timings_lp384.txt @@ -0,0 +1,252 @@ +CELL CascadeBuf +IOPATH I O 137.402:178.5:217.075 170.116:221:268.76 + +CELL CascadeMux +IOPATH I O 0:0:0 0:0:0 + +CELL CEMux +IOPATH I O 562.692:731:888.975 516.892:671.5:816.617 + +CELL ClkMux +IOPATH I O 287.889:374:454.825 215.917:280.5:341.118 + +CELL gio2CtrlBuf +IOPATH I O 0:0:0 0:0:0 + +CELL Glb2LocalMux +IOPATH I O 418.748:544:661.563 333.689:433.5:527.183 + +CELL GlobalMux +IOPATH I O 143.944:187:227.412 71.9722:93.5:113.706 + +CELL ICE_GB +IOPATH USERSIGNALTOGLOBALBUFFER GLOBALBUFFEROUTPUT 575.778:748:909.649 523.434:680:826.954 + +CELL InMux +IOPATH I O 242.088:314.5:382.466 202.831:263.5:320.445 + +CELL INV +IOPATH I O 0:0:0 0:0:0 + +CELL IO_PAD +IOPATH DIN PACKAGEPIN 2291.5:2291.5:2291.5 2353.2:2353.2:2353.2 +IOPATH OE PACKAGEPIN 1902:1902:1902 1990:1990:1990 +IOPATH OE PACKAGEPIN 1973:1973:1973 1942:1942:1942 +IOPATH OE PACKAGEPIN 2291.5:2291.5:2291.5 2353.2:2353.2:2353.2 +IOPATH PACKAGEPIN DOUT 590:590:590 540:540:540 + +CELL IoInMux +IOPATH I O 242.088:314.5:382.466 202.831:263.5:320.445 + +CELL IoSpan4Mux +IOPATH I O 268.26:348.5:423.814 300.975:391:475.498 + +CELL LocalMux +IOPATH I O 307.518:399.5:485.835 287.889:374:454.825 + +CELL LogicCell40 +HOLD negedge:ce posedge:clk 0:0:0 +HOLD negedge:in0 posedge:clk 0:0:0 +HOLD negedge:in1 posedge:clk 0:0:0 +HOLD negedge:in2 posedge:clk 0:0:0 +HOLD negedge:in3 posedge:clk 0:0:0 +HOLD negedge:sr posedge:clk -184.184:-239.275:-290.984 +HOLD posedge:ce posedge:clk 0:0:0 +HOLD posedge:in0 posedge:clk 0:0:0 +HOLD posedge:in1 posedge:clk 0:0:0 +HOLD posedge:in2 posedge:clk 0:0:0 +HOLD posedge:in3 posedge:clk 0:0:0 +HOLD posedge:sr posedge:clk -167.106:-217.09:-264.005 +RECOVERY negedge:sr posedge:clk 148.983:193.545:235.372 +RECOVERY posedge:sr posedge:clk 0:0:0 +REMOVAL negedge:sr posedge:clk 0:0:0 +REMOVAL posedge:sr posedge:clk 0:0:0 +SETUP negedge:ce posedge:clk 0:0:0 +SETUP negedge:in0 posedge:clk 372.947:484.5:589.205 +SETUP negedge:in1 posedge:clk 353.318:459:558.194 +SETUP negedge:in2 posedge:clk 300.975:391:475.498 +SETUP negedge:in3 posedge:clk 202.831:263.5:320.445 +SETUP negedge:sr posedge:clk 130.859:170:206.738 +SETUP posedge:ce posedge:clk 0:0:0 +SETUP posedge:in0 posedge:clk 438.376:569.5:692.574 +SETUP posedge:in1 posedge:clk 372.947:484.5:589.205 +SETUP posedge:in2 posedge:clk 346.775:450.5:547.857 +SETUP posedge:in3 posedge:clk 255.174:331.5:403.14 +SETUP posedge:sr posedge:clk 189.745:246.5:299.771 +IOPATH carryin carryout 117.773:153:186.065 98.144:127.5:155.054 +IOPATH in0 lcout 418.748:544:661.563 359.861:467.5:568.531 +IOPATH in0 ltout 340.232:442:537.52 359.861:467.5:568.531 +IOPATH in1 carryout 242.088:314.5:382.466 229.003:297.5:361.792 +IOPATH in1 lcout 372.947:484.5:589.205 353.318:459:558.194 +IOPATH in1 ltout 300.975:391:475.498 353.318:459:558.194 +IOPATH in2 carryout 215.917:280.5:341.118 124.316:161.5:196.402 +IOPATH in2 lcout 353.318:459:558.194 327.147:425:516.846 +IOPATH in2 ltout 287.889:374:454.825 320.604:416.5:506.509 +IOPATH in3 lcout 294.432:382.5:465.161 268.26:348.5:423.814 +IOPATH in3 ltout 248.631:323:392.803 255.174:331.5:403.14 +IOPATH posedge:clk lcout 503.806:654.5:795.943 503.806:654.5:795.943 +IOPATH sr lcout 0:0:0 558.989:726.189:883.125 +IOPATH sr lcout 558.963:726.155:883.083 0:0:0 + +CELL Odrv4 +IOPATH I O 327.147:425:516.846 346.775:450.5:547.857 + +CELL Odrv12 +IOPATH I O 458.005:595:723.585 503.806:654.5:795.943 + +CELL PRE_IO +HOLD negedge:CLOCKENABLE posedge:INPUTCLK 0:0:0 +HOLD negedge:CLOCKENABLE posedge:OUTPUTCLK 0:0:0 +HOLD negedge:DOUT0 posedge:OUTPUTCLK 0:0:0 +HOLD negedge:DOUT1 negedge:OUTPUTCLK 0:0:0 +HOLD negedge:OUTPUTENABLE posedge:OUTPUTCLK 0:0:0 +HOLD negedge:PADIN negedge:INPUTCLK -785.152:-1020:-1240.43 +HOLD negedge:PADIN posedge:INPUTCLK -785.152:-1020:-1240.43 +HOLD posedge:CLOCKENABLE posedge:INPUTCLK 0:0:0 +HOLD posedge:CLOCKENABLE posedge:OUTPUTCLK 0:0:0 +HOLD posedge:DOUT0 posedge:OUTPUTCLK 0:0:0 +HOLD posedge:DOUT1 negedge:OUTPUTCLK 0:0:0 +HOLD posedge:OUTPUTENABLE posedge:OUTPUTCLK 0:0:0 +HOLD posedge:PADIN negedge:INPUTCLK -785.152:-1020:-1240.43 +HOLD posedge:PADIN posedge:INPUTCLK -785.152:-1020:-1240.43 +SETUP negedge:CLOCKENABLE posedge:INPUTCLK 65.4293:85:103.369 +SETUP negedge:CLOCKENABLE posedge:OUTPUTCLK 65.4293:85:103.369 +SETUP negedge:DOUT0 posedge:OUTPUTCLK 65.4293:85:103.369 +SETUP negedge:DOUT1 negedge:OUTPUTCLK 65.4293:85:103.369 +SETUP negedge:OUTPUTENABLE posedge:OUTPUTCLK 65.4293:85:103.369 +SETUP negedge:PADIN negedge:INPUTCLK 1962.88:2550:3101.08 +SETUP negedge:PADIN posedge:INPUTCLK 1962.88:2550:3101.08 +SETUP posedge:CLOCKENABLE posedge:INPUTCLK 71.9722:93.5:113.706 +SETUP posedge:CLOCKENABLE posedge:OUTPUTCLK 71.9722:93.5:113.706 +SETUP posedge:DOUT0 posedge:OUTPUTCLK 71.9722:93.5:113.706 +SETUP posedge:DOUT1 negedge:OUTPUTCLK 71.9722:93.5:113.706 +SETUP posedge:OUTPUTENABLE posedge:OUTPUTCLK 71.9722:93.5:113.706 +SETUP posedge:PADIN negedge:INPUTCLK 1969.42:2558.5:3111.41 +SETUP posedge:PADIN posedge:INPUTCLK 1969.42:2558.5:3111.41 +IOPATH DOUT0 PADOUT 1871.28:2431:2956.36 2087.19:2711.5:3297.48 +IOPATH LATCHINPUTVALUE DIN0 320.604:416.5:506.509 346.775:450.5:547.857 +IOPATH negedge:INPUTCLK DIN1 130.859:170:206.738 130.859:170:206.738 +IOPATH negedge:OUTPUTCLK PADOUT 104.687:136:165.391 130.859:170:206.738 +IOPATH OUTPUTENABLE PADOEN 163.573:212.5:258.423 196.288:255:310.108 +IOPATH PADIN DIN0 575.778:748:909.649 431.833:561:682.237 +IOPATH posedge:INPUTCLK DIN0 130.859:170:206.738 130.859:170:206.738 +IOPATH posedge:OUTPUTCLK PADOEN 104.687:136:165.391 130.859:170:206.738 +IOPATH posedge:OUTPUTCLK PADOUT 104.687:136:165.391 130.859:170:206.738 + +CELL PRE_IO_GBUF +IOPATH PADSIGNALTOGLOBALBUFFER GLOBALBUFFEROUTPUT 1583.39:2057:2501.54 1439.44:1870:2274.12 + +CELL Sp12to4 +IOPATH I O 399.119:518.5:630.552 418.748:544:661.563 + +CELL Span4Mux_h0 +IOPATH I O 137.402:178.5:217.075 130.859:170:206.738 + +CELL Span4Mux_h1 +IOPATH I O 163.573:212.5:258.423 157.03:204:248.086 + +CELL Span4Mux_h2 +IOPATH I O 189.745:246.5:299.771 189.745:246.5:299.771 + +CELL Span4Mux_h3 +IOPATH I O 215.917:280.5:341.118 215.917:280.5:341.118 + +CELL Span4Mux_h4 +IOPATH I O 281.346:365.5:444.488 294.432:382.5:465.161 + +CELL Span4Mux_v0 +IOPATH I O 189.745:246.5:299.771 176.659:229.5:279.097 + +CELL Span4Mux_v1 +IOPATH I O 189.745:246.5:299.771 183.202:238:289.434 + +CELL Span4Mux_v2 +IOPATH I O 235.546:306:372.129 235.546:306:372.129 + +CELL Span4Mux_v3 +IOPATH I O 294.432:382.5:465.161 314.061:408:496.172 + +CELL Span4Mux_v4 +IOPATH I O 327.147:425:516.846 346.775:450.5:547.857 + +CELL Span12Mux_h0 +IOPATH I O 130.859:170:206.738 137.402:178.5:217.075 + +CELL Span12Mux_h1 +IOPATH I O 124.316:161.5:196.402 124.316:161.5:196.402 + +CELL Span12Mux_h2 +IOPATH I O 150.487:195.5:237.749 157.03:204:248.086 + +CELL Span12Mux_h3 +IOPATH I O 157.03:204:248.086 170.116:221:268.76 + +CELL Span12Mux_h4 +IOPATH I O 183.202:238:289.434 202.831:263.5:320.445 + +CELL Span12Mux_h5 +IOPATH I O 215.917:280.5:341.118 242.088:314.5:382.466 + +CELL Span12Mux_h6 +IOPATH I O 235.546:306:372.129 261.717:340:413.477 + +CELL Span12Mux_h7 +IOPATH I O 268.26:348.5:423.814 300.975:391:475.498 + +CELL Span12Mux_h8 +IOPATH I O 320.604:416.5:506.509 359.861:467.5:568.531 + +CELL Span12Mux_h9 +IOPATH I O 366.404:476:578.868 405.662:527:640.889 + +CELL Span12Mux_h10 +IOPATH I O 399.119:518.5:630.552 438.376:569.5:692.574 + +CELL Span12Mux_h11 +IOPATH I O 438.376:569.5:692.574 490.72:637.5:775.269 + +CELL Span12Mux_h12 +IOPATH I O 458.005:595:723.585 503.806:654.5:795.943 + +CELL Span12Mux_v0 +IOPATH I O 91.601:119:144.717 98.144:127.5:155.054 + +CELL Span12Mux_v1 +IOPATH I O 98.144:127.5:155.054 98.144:127.5:155.054 + +CELL Span12Mux_v2 +IOPATH I O 130.859:170:206.738 143.944:187:227.412 + +CELL Span12Mux_v3 +IOPATH I O 137.402:178.5:217.075 157.03:204:248.086 + +CELL Span12Mux_v4 +IOPATH I O 170.116:221:268.76 196.288:255:310.108 + +CELL Span12Mux_v5 +IOPATH I O 222.46:289:351.455 248.631:323:392.803 + +CELL Span12Mux_v6 +IOPATH I O 242.088:314.5:382.466 268.26:348.5:423.814 + +CELL Span12Mux_v7 +IOPATH I O 261.717:340:413.477 294.432:382.5:465.161 + +CELL Span12Mux_v8 +IOPATH I O 333.689:433.5:527.183 366.404:476:578.868 + +CELL Span12Mux_v9 +IOPATH I O 353.318:459:558.194 392.576:510:620.215 + +CELL Span12Mux_v10 +IOPATH I O 366.404:476:578.868 405.662:527:640.889 + +CELL Span12Mux_v11 +IOPATH I O 386.033:501.5:609.878 425.29:552.5:671.9 + +CELL Span12Mux_v12 +IOPATH I O 458.005:595:723.585 503.806:654.5:795.943 + +CELL SRMux +IOPATH I O 431.833:561:682.237 333.689:433.5:527.183 + diff --git a/icefuzz/tmedges.txt b/icefuzz/tmedges.txt index 421e8d4..a844df4 100644 --- a/icefuzz/tmedges.txt +++ b/icefuzz/tmedges.txt @@ -688,6 +688,7 @@ Span4Mux_s2_h.O Span4Mux_h.I Span4Mux_s2_h.O Span4Mux_s0_v.I Span4Mux_s2_h.O Span4Mux_s1_v.I Span4Mux_s2_h.O Span4Mux_s2_v.I +Span4Mux_s2_h.O Span4Mux_s3_h.I Span4Mux_s2_h.O Span4Mux_s3_v.I Span4Mux_s2_h.O Span4Mux_v.I Span4Mux_s2_v.O IoSpan4Mux.I @@ -703,6 +704,7 @@ Span4Mux_s3_h.O LocalMux.I Span4Mux_s3_h.O Span4Mux_h.I Span4Mux_s3_h.O Span4Mux_s0_v.I Span4Mux_s3_h.O Span4Mux_s1_v.I +Span4Mux_s3_h.O Span4Mux_s2_h.I Span4Mux_s3_h.O Span4Mux_s2_v.I Span4Mux_s3_h.O Span4Mux_s3_v.I Span4Mux_s3_h.O Span4Mux_v.I |