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| author | Mihály Horváth <hermitsoft@users.noreply.github.com> | 2017-03-05 22:25:47 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-03-05 22:25:47 +0100 |
| commit | fdf863b791ac3b09345e59456185d07589b9bbaa (patch) | |
| tree | 80cab540be488dc4ee8c8313233de6795cbdebde | |
| parent | 7ea1726fcc07b5320af48a37ec1397c6935dd49a (diff) | |
| download | icestorm-fdf863b791ac3b09345e59456185d07589b9bbaa.tar.gz icestorm-fdf863b791ac3b09345e59456185d07589b9bbaa.tar.bz2 icestorm-fdf863b791ac3b09345e59456185d07589b9bbaa.zip | |
LP384 support in icepack (tested on real chip)
LP384 is now supported in icepack, it was fairly easy to realize as only the main chip dimensions are required that could be found out from the .bin bitsream file generated by iCEcube.
Tested by creating .asc then packing it back to .bin. The testcase is just a simple LED on/off on a port though but that shows geometries are fine.
Now I'm trying to have and support chipdb-384.txt hopefully with some help from the authors and anyone who already knows the internals of IceStorm well. I need info, how to reverse-engineer iCE40 chips the easiest way. Scripts maybe.
I'm trying to reach my goal in any way coz iCEcube sucks and IceStorm integrates well into commandline...
| -rw-r--r-- | icepack/icepack.cc | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/icepack/icepack.cc b/icepack/icepack.cc index b5db4c5..85a37d6 100644 --- a/icepack/icepack.cc +++ b/icepack/icepack.cc @@ -42,7 +42,7 @@ using std::vector; using std::string; -int log_level = 0; +int log_level = 1; // 0; #define log(...) fprintf(stderr, __VA_ARGS__); #define info(...) do { if (log_level > 0) fprintf(stderr, __VA_ARGS__); } while (0) #define debug(...) do { if (log_level > 1) fprintf(stderr, __VA_ARGS__); } while (0) @@ -390,7 +390,9 @@ void FpgaConfig::read_bits(std::istream &ifs) } } - if (this->cram_width == 332 && this->cram_height == 144) + if (this->cram_width == 182 && this->cram_height == 80) + this->device = "384"; + else if (this->cram_width == 332 && this->cram_height == 144) this->device = "1k"; else if (this->cram_width == 872 && this->cram_height == 272) this->device = "8k"; @@ -598,6 +600,12 @@ void FpgaConfig::read_ascii(std::istream &ifs) is >> this->device; + if (this->device == "384") { + this->cram_width = 182; + this->cram_height = 80; + this->bram_width = 0; + this->bram_height = 0; + } else if (this->device == "1k") { this->cram_width = 332; this->cram_height = 144; @@ -857,6 +865,7 @@ void FpgaConfig::write_bram_pbm(std::ostream &ofs, int bank_num) const int FpgaConfig::chip_width() const { + if (this->device == "384") return 6; if (this->device == "1k") return 12; if (this->device == "8k") return 32; panic("Unknown chip type '%s'.\n", this->device.c_str()); @@ -864,6 +873,7 @@ int FpgaConfig::chip_width() const int FpgaConfig::chip_height() const { + if (this->device == "384") return 8; if (this->device == "1k") return 16; if (this->device == "8k") return 32; panic("Unknown chip type '%s'.\n", this->device.c_str()); @@ -871,6 +881,7 @@ int FpgaConfig::chip_height() const vector<int> FpgaConfig::chip_cols() const { + if (this->device == "384") return vector<int>({18, 54, 54, 54, 54}); if (this->device == "1k") return vector<int>({18, 54, 54, 42, 54, 54, 54}); if (this->device == "8k") return vector<int>({18, 54, 54, 54, 54, 54, 54, 54, 42, 54, 54, 54, 54, 54, 54, 54, 54}); panic("Unknown chip type '%s'.\n", this->device.c_str()); @@ -881,6 +892,8 @@ string FpgaConfig::tile_type(int x, int y) const if ((x == 0 || x == this->chip_width()+1) && (y == 0 || y == this->chip_height()+1)) return "corner"; if ((x == 0 || x == this->chip_width()+1) || (y == 0 || y == this->chip_height()+1)) return "io"; + if (this->device == "384") return "logic"; + if (this->device == "1k") { if (x == 3 || x == 10) return y % 2 == 1 ? "ramb" : "ramt"; return "logic"; |