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| author | David Shah <davey1576@gmail.com> | 2017-11-18 15:38:14 +0000 |
|---|---|---|
| committer | David Shah <davey1576@gmail.com> | 2017-11-18 15:38:14 +0000 |
| commit | b059f37b5006bd12ae10f3e847fb394b2540aa6a (patch) | |
| tree | 601ac31464251e6a41b8efb9cd45e43ac25059c9 | |
| parent | 8fc49d07560f6bc434f9028086825388e5731a4f (diff) | |
| download | icestorm-b059f37b5006bd12ae10f3e847fb394b2540aa6a.tar.gz icestorm-b059f37b5006bd12ae10f3e847fb394b2540aa6a.tar.bz2 icestorm-b059f37b5006bd12ae10f3e847fb394b2540aa6a.zip | |
Add all cf_bits and pullup strength notes
| -rw-r--r-- | docs/ultraplus.html | 15 | ||||
| -rw-r--r-- | icebox/icebox.py | 12 |
2 files changed, 27 insertions, 0 deletions
diff --git a/docs/ultraplus.html b/docs/ultraplus.html index e5706e6..da109b5 100644 --- a/docs/ultraplus.html +++ b/docs/ultraplus.html @@ -249,4 +249,19 @@ can be used as an open-drain IO using the standard IO cell.</p> <tr><td>CURRENT_MODE</td><td>(0, 28, CBIT_4)</td></tr> </table> + +<h2>IO Changes</h2> +<p>The IO tiles contain a few new bits compared to earlier ice40 devices. + The bits <span style="font-family:monospace">padeb_test_0</span> and + <span style="font-family:monospace">padeb_test_1</span> are set for all pins, + even unused ones, unless set as an output.</p> +<p>There are also some new bits used to control the pullup strength:</p> +<table class="ctab"> +<tr><th>Strength</th><th>Cell 0</th><th>Cell 1</th></tr> +<tr><td>3.3kΩ</td><td>cf_bit_32<br/>B7[10]</td><td>cf_bit_36<br/>B13[10]</td></tr> +<tr><td>6.8kΩ</td><td>cf_bit_33<br/>B6[10]</td><td>cf_bit_37<br/>B12[10]</td></tr> +<tr><td>10kΩ</td><td>cf_bit_34<br/>B7[15]</td><td>cf_bit_38<br/>B13[15]</td></tr> +<tr><td>100kΩ<br/>(default)</td><td>!cf_bit_35<br/>!B6[15]</td><td>!cf_bit_39<br/>!B12[15]</td></tr> + +</table> </body></html> diff --git a/icebox/icebox.py b/icebox/icebox.py index ce2a3cd..6b0dfd8 100644 --- a/icebox/icebox.py +++ b/icebox/icebox.py @@ -4808,13 +4808,25 @@ logictile_384_db.append([["B1[50]"], "CarryInSet"]) iotile_t_5k_db = list(iotile_t_db) iotile_t_5k_db.append([["B14[15]"], "IoCtrl", "padeb_test_1"]) iotile_t_5k_db.append([["B15[14]"], "IoCtrl", "padeb_test_0"]) +iotile_t_5k_db.append([["B7[10]"], "IoCtrl", "cf_bit_32"]) +iotile_t_5k_db.append([["B6[10]"], "IoCtrl", "cf_bit_33"]) +iotile_t_5k_db.append([["B7[15]"], "IoCtrl", "cf_bit_34"]) iotile_t_5k_db.append([["B6[15]"], "IoCtrl", "cf_bit_35"]) +iotile_t_5k_db.append([["B13[10]"], "IoCtrl", "cf_bit_36"]) +iotile_t_5k_db.append([["B12[10]"], "IoCtrl", "cf_bit_37"]) +iotile_t_5k_db.append([["B13[15]"], "IoCtrl", "cf_bit_38"]) iotile_t_5k_db.append([["B12[15]"], "IoCtrl", "cf_bit_39"]) iotile_b_5k_db = list(iotile_b_db) iotile_b_5k_db.append([["B14[15]"], "IoCtrl", "padeb_test_1"]) iotile_b_5k_db.append([["B15[14]"], "IoCtrl", "padeb_test_0"]) +iotile_b_5k_db.append([["B7[10]"], "IoCtrl", "cf_bit_32"]) +iotile_b_5k_db.append([["B6[10]"], "IoCtrl", "cf_bit_33"]) +iotile_b_5k_db.append([["B7[15]"], "IoCtrl", "cf_bit_34"]) iotile_b_5k_db.append([["B6[15]"], "IoCtrl", "cf_bit_35"]) +iotile_b_5k_db.append([["B13[10]"], "IoCtrl", "cf_bit_36"]) +iotile_b_5k_db.append([["B12[10]"], "IoCtrl", "cf_bit_37"]) +iotile_b_5k_db.append([["B13[15]"], "IoCtrl", "cf_bit_38"]) iotile_b_5k_db.append([["B12[15]"], "IoCtrl", "cf_bit_39"]) for db in [iotile_l_db, iotile_r_db, iotile_t_db, iotile_b_db, iotile_t_5k_db, iotile_b_5k_db, logictile_db, logictile_5k_db, logictile_8k_db, logictile_384_db, rambtile_db, ramttile_db, rambtile_5k_db, ramttile_5k_db, rambtile_8k_db, ramttile_8k_db, dsp0_5k_db, dsp1_5k_db, dsp2_5k_db, dsp3_5k_db, ipcon_5k_db]: |