testsuite/synth/pkg01/cmask.vhdl


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library ieee;
use ieee.std_logic_1164.all;

entity cmask is
  port (d : std_logic_vector (7 downto 0);
        o : out std_logic_vector (7 downto 0));
end cmask;

use work.pkg.all;

architecture behav of cmask is
begin
  o <= d and mask;
end behav;