blob: 827a5a11e444ec3c5d79f6ffbc3dda0bc8518d9f (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity sub04 is
port (i : std_logic_vector (3 downto 0);
o : out std_logic_vector (3 downto 0));
end entity;
architecture arch of sub04 is
begin
o <= i - (-9);
end arch;
|
