blob: 53f0a5c2c8861e7ed065e8b64ba4e702475887ec (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity func01 is
port (a : std_logic_vector (7 downto 0);
b : out std_logic_vector (7 downto 0));
end func01;
architecture behav of func01 is
function "+"(l, r : std_logic_vector) return std_logic_Vector is
begin
return std_logic_vector(unsigned(l) + unsigned(r));
end "+";
begin
b <= a + a;
end behav;
|
