blob: 1a89c312322f30b30bb84dec6a388bd341395b17 (
plain)
1
2
3
4
5
6
7
8
9
10
|
library ieee;
use ieee.std_logic_1164.all;
entity A_tb is
end entity;
architecture A_tb_impl of A_tb is
begin
a : work.a(a) port map(a => a); -- syntax error here, missing 'entity'
end architecture;
|