| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | testsuite/synth: fix assert1 assertion. | Tristan Gingold | 2019-08-15 | 1 | -1/+1 |
| * | synth: extract edge for PSL clocks. | Tristan Gingold | 2019-08-13 | 1 | -0/+27 |
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index : iCE40/ghdl | |
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