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* vhdl-sem_decls: avoid a crash after a parse error.Tristan Gingold2020-10-071-4/+11
* vhdl-sem_types: improve error handling on index subtypes. Fix #1473Tristan Gingold2020-09-291-3/+7
* netlists-disp_vhdl: handle null vectors for reducation operators.Tristan Gingold2020-09-281-3/+12
* vhdl-sem_psl: fix crash in case of error in assert statement. Fix #1480Tristan Gingold2020-09-281-2/+5
* vhdl-canon: canon generic associations for subprogram instantiations.Tristan Gingold2020-09-281-1/+6
* vhdl-sem_expr: evaluate operands only if the operator result is not static.Tristan Gingold2020-09-281-5/+13
* vhdl-evaluation: minor rewrite.Tristan Gingold2020-09-281-5/+5
* synth_subtype_conversion: check overflow for discrete types.Tristan Gingold2020-09-281-24/+31
* vhdl: evaluate operands of operators, check bounds. For #1475Tristan Gingold2020-09-262-14/+30
* synth: minor refactoring. Move In_Bounds/In_Range to synth-objtypes.Tristan Gingold2020-09-265-21/+23
* vhdl: analyze subprogram instantiations. WIP. For #1470Tristan Gingold2020-09-2611-217/+390
* vhdl: parse subprogram instantiations. For #1470Tristan Gingold2020-09-249-287/+495
* vhdl-sem_types: fix staticness of 'open' array constraint. Fix #1469Tristan Gingold2020-09-211-0/+1
* ghdldrv: adjust style and some error messages.Tristan Gingold2020-09-207-141/+99
* cli: rework syntax, add commands without '-' or '--'umarcor2020-09-209-136/+353
* synth-disp_vhdl: extend vector conversions (for any range). For #1460Tristan Gingold2020-09-201-2/+20
* synth-expr: refine is_positive for wires. For #1460Tristan Gingold2020-09-201-2/+6
* synth: handle static resize. For #1460Tristan Gingold2020-09-203-0/+36
* synth: handle find_leftmost/find_rigthmost. For #1460Tristan Gingold2020-09-191-0/+77
* vhdl: recognize find_leftmost/find_rightmost. For #1460Tristan Gingold2020-09-164-1/+41
* vhdl: recognize reduce operations from numeric_std.Tristan Gingold2020-09-143-6/+86
* synth: improve support of interface package. For #1460Tristan Gingold2020-09-133-66/+105
* vhdl: allow conflict design unit name with -frelaxedTristan Gingold2020-09-122-17/+43
* sem_parenthesis_name: handle more error cases.Tristan Gingold2020-09-061-1/+5
* vhdl: sem_parenthesis_name: do not crash on any type attribute. Fix #1456Tristan Gingold2020-09-061-18/+19
* netlists-cleanup: do not remove user sub modules. Fix #1454Tristan Gingold2020-09-051-3/+7
* synth-static_oper: fix crash on exponential. Fix #1442Tristan Gingold2020-08-261-1/+1
* synth: handle evaluated string literals without constraints.Tristan Gingold2020-08-261-2/+24
* synth: improve diagnostic for multiple assignment. Fix #1428Tristan Gingold2020-08-265-19/+191
* trans-rtis: adjust max_depth of records. For #1404Tristan Gingold2020-08-261-3/+7
* grt-disp_signals: add code to display last value (disabled).Tristan Gingold2020-08-261-0/+8
* vhdl/translate: handle vhdl-93 'last_value. Fix #1440Tristan Gingold2020-08-266-75/+207
* synth-stmts: convert the waveform to the target subtype.Tristan Gingold2020-08-251-7/+13
* vhdl-evaluation: make eval_dyadic_bit_array_operator more generic.Tristan Gingold2020-08-251-42/+71
* vhdl-sem_names: check name staticness of signal attributes. Fix #1412Tristan Gingold2020-08-081-58/+79
* vhdl-canon: minor cleanup.Tristan Gingold2020-08-082-61/+0
* vhdl: renaming in vhdl-canon.Tristan Gingold2020-08-085-188/+202
* synth-oper: handle operators of std_logic_unsigned.Tristan Gingold2020-08-071-65/+99
* synth-oper: handle more std_logic_arith operators.Tristan Gingold2020-08-071-226/+180
* vhdl: recognize more operators for std_logic_unsigned/signed.Tristan Gingold2020-08-072-32/+128
* vhdl: recognize more std_logic_arith operators.Tristan Gingold2020-08-074-27/+122
* netlists: preliminary support of memory of depth one.Tristan Gingold2020-08-061-2/+0
* synth: handle an operation from std_logic_unsigned. For #1426Tristan Gingold2020-08-061-1/+2
* synth-oper: handle more operations for std_logic_arith. For #1426Tristan Gingold2020-08-062-142/+339
* trans-chap6: fix reuse violation of a node.Tristan Gingold2020-08-061-0/+1
* synth-oper: propagate errors from unsupported operations.Tristan Gingold2020-08-061-2/+7
* synth-disp_vhdl: minor output indentation fix.Tristan Gingold2020-08-061-1/+1
* synth-oper: handle < for enums.Tristan Gingold2020-08-061-0/+2
* synth: push extract on mux2 for inference. For #1421Tristan Gingold2020-08-063-17/+52
* vhdl-sem_names: use element type of prefix type for indexed names.Tristan Gingold2020-08-052-10/+16
} /* Comment.Multiline */ .highlight .cp { color: #cc0000; font-weight: bold } /* Comment.Preproc */ .highlight .cpf { color: #888888 } /* Comment.PreprocFile */ .highlight .c1 { color: #888888 } /* Comment.Single */ .highlight .cs { color: #cc0000; font-weight: bold; background-color: #fff0f0 } /* Comment.Special */ .highlight .gd { color: #000000; background-color: #ffdddd } /* Generic.Deleted */ .highlight .ge { font-style: italic } /* Generic.Emph */ .highlight .gr { color: #aa0000 } /* Generic.Error */ .highlight .gh { color: #333333 } /* Generic.Heading */ .highlight .gi { color: #000000; background-color: #ddffdd } /* Generic.Inserted */ .highlight .go { color: #888888 } /* Generic.Output */ .highlight .gp { color: #555555 } /* Generic.Prompt */ .highlight .gs { font-weight: bold } /* Generic.Strong */ .highlight .gu { color: #666666 } /* Generic.Subheading */ .highlight .gt { color: #aa0000 } /* Generic.Traceback */ .highlight .kc { color: #008800; font-weight: bold } /* Keyword.Constant */ .highlight .kd { color: #008800; font-weight: bold } /* Keyword.Declaration */ .highlight .kn { color: #008800; font-weight: bold } /* Keyword.Namespace */ .highlight .kp { color: #008800 } /* Keyword.Pseudo */ .highlight .kr { color: #008800; font-weight: bold } /* Keyword.Reserved */ .highlight .kt { color: #888888; font-weight: bold } /* Keyword.Type */ .highlight .m { color: #0000DD; font-weight: bold } /* Literal.Number */ .highlight .s { color: #dd2200; background-color: #fff0f0 } /* Literal.String */ .highlight .na { color: #336699 } /* Name.Attribute */ .highlight .nb { color: #003388 } /* Name.Builtin */ .highlight .nc { color: #bb0066; font-weight: bold } /* Name.Class */ .highlight .no { color: #003366; font-weight: bold } /* Name.Constant */ .highlight .nd { color: #555555 } /* Name.Decorator */ .highlight .ne { color: #bb0066; font-weight: bold } /* Name.Exception */ .highlight .nf { color: #0066bb; font-weight: bold } /* Name.Function */ .highlight .nl { color: #336699; font-style: italic } /* Name.Label */ .highlight .nn { color: #bb0066; font-weight: bold } /* Name.Namespace */ .highlight .py { color: #336699; font-weight: bold } /* Name.Property */ .highlight .nt { color: #bb0066; font-weight: bold } /* Name.Tag */ .highlight .nv { color: #336699 } /* Name.Variable */ .highlight .ow { color: #008800 } /* Operator.Word */ .highlight .w { color: #bbbbbb } /* Text.Whitespace */ .highlight .mb { color: #0000DD; font-weight: bold } /* Literal.Number.Bin */ .highlight .mf { color: #0000DD; font-weight: bold } /* Literal.Number.Float */ .highlight .mh { color: #0000DD; font-weight: bold } /* Literal.Number.Hex */ .highlight .mi { color: #0000DD; font-weight: bold } /* Literal.Number.Integer */ .highlight .mo { color: #0000DD; font-weight: bold } /* Literal.Number.Oct */ .highlight .sa { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Affix */ .highlight .sb { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Backtick */ .highlight .sc { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Char */ .highlight .dl { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Delimiter */ .highlight .sd { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Doc */ .highlight .s2 { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Double */ .highlight .se { color: #0044dd; background-color: #fff0f0 } /* Literal.String.Escape */ .highlight .sh { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Heredoc */ .highlight .si { color: #3333bb; background-color: #fff0f0 } /* Literal.String.Interpol */ .highlight .sx { color: #22bb22; background-color: #f0fff0 } /* Literal.String.Other */ .highlight .sr { color: #008800; background-color: #fff0ff } /* Literal.String.Regex */ .highlight .s1 { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Single */ .highlight .ss { color: #aa6600; background-color: #fff0f0 } /* Literal.String.Symbol */ .highlight .bp { color: #003388 } /* Name.Builtin.Pseudo */ .highlight .fm { color: #0066bb; font-weight: bold } /* Name.Function.Magic */ .highlight .vc { color: #336699 } /* Name.Variable.Class */ .highlight .vg { color: #dd7700 } /* Name.Variable.Global */ .highlight .vi { color: #3333bb } /* Name.Variable.Instance */ .highlight .vm { color: #336699 } /* Name.Variable.Magic */ .highlight .il { color: #0000DD; font-weight: bold } /* Literal.Number.Integer.Long */
--  Nodes recognizer for ieee.std_logic_arith.
--  Copyright (C) 2019 Tristan Gingold
--
--  GHDL is free software; you can redistribute it and/or modify it under
--  the terms of the GNU General Public License as published by the Free
--  Software Foundation; either version 2, or (at your option) any later
--  version.
--
--  GHDL is distributed in the hope that it will be useful, but WITHOUT ANY
--  WARRANTY; without even the implied warranty of MERCHANTABILITY or
--  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
--  for more details.
--
--  You should have received a copy of the GNU General Public License
--  along with GHDL; see the file COPYING.  If not, write to the Free
--  Software Foundation, 59 Temple Place - Suite 330, Boston, MA
--  02111-1307, USA.

with Types; use Types;
with Vhdl.Std_Package;
with Std_Names; use Std_Names;
with Vhdl.Errors; use Vhdl.Errors;
with Vhdl.Ieee.Std_Logic_1164;

package body Vhdl.Ieee.Std_Logic_Arith is
   --  Unsigned and signed type definition.
   Unsigned_Type : Iir := Null_Iir;
   Signed_Type : Iir := Null_Iir;

   type Arg_Kind is (Type_Slv, Type_Signed, Type_Unsigned, Type_Int, Type_Log);

   subtype Conv_Arg_Kind is Arg_Kind range Type_Signed .. Type_Log;
   type Conv_Pattern_Type is
     array (Conv_Arg_Kind) of Iir_Predefined_Functions;

   subtype Res_Arg_Kind is Arg_Kind range Type_Slv .. Type_Unsigned;

   type Bin_Pattern_Type is
     array (Res_Arg_Kind, Conv_Arg_Kind, Conv_Arg_Kind)
     of Iir_Predefined_Functions;

   subtype Cmp_Arg_Kind is Arg_Kind range Type_Signed .. Type_Int;

   type Cmp_Pattern_Type is array (Cmp_Arg_Kind, Cmp_Arg_Kind)
     of Iir_Predefined_Functions;

   Conv_Uns_Patterns : constant Conv_Pattern_Type :=
     (Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn,
      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Uns,
      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Int,
      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Log);

   Conv_Int_Patterns : constant Conv_Pattern_Type :=
     (Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Sgn,
      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Uns,
      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Int,
      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Log);

   Conv_Vec_Patterns : constant Conv_Pattern_Type :=
     (Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Vector_Sgn,
      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Vector_Uns,
      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Vector_Int,
      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Vector_Log);

   Mul_Patterns : constant Bin_Pattern_Type :=
     (Type_Slv =>
        (Type_Unsigned =>
           (Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv,
            Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv,
            others => Iir_Predefined_None),
         Type_Signed =>
           (Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv,
            Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv,
            others => Iir_Predefined_None),
         others =>
           (others => Iir_Predefined_None)),
      Type_Signed =>
        (Type_Signed =>
           (Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn,
            Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn,
            others => Iir_Predefined_None),
         Type_Unsigned =>
           (Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn,
            others => Iir_Predefined_None),
         others =>
           (others => Iir_Predefined_None)),
      Type_Unsigned =>
        (Type_Unsigned =>
           (Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns,
            others => Iir_Predefined_None),
         others =>
           (others => Iir_Predefined_None)));

   Add_Patterns : constant Bin_Pattern_Type :=
     (Type_Slv =>
        (Type_Unsigned =>
           (Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv,
            Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv,
            Type_Int =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Uns_Int_Slv,
            Type_Log =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Uns_Log_Slv),
         Type_Signed =>
           (Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv,
            Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv,
            Type_Int =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv,
            Type_Log =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv),
         Type_Int =>
           (Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Int_Uns_Slv,
            Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv,
            others => Iir_Predefined_None),
         Type_Log =>
           (Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Log_Uns_Slv,
            Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv,
            others => Iir_Predefined_None)),
      Type_Signed =>
        (Type_Signed =>
           (Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn,
            Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn,
            Type_Int =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn,
            Type_Log =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn),
         Type_Unsigned =>
           (Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn,
            others => Iir_Predefined_None),
         Type_Int =>
           (Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn,
            others => Iir_Predefined_None),
         Type_Log =>
           (Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn,
            others => Iir_Predefined_None)),
      Type_Unsigned =>
        (Type_Unsigned =>
           (Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns,
            Type_Int =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Uns_Int_Uns,
            Type_Log =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Add_Uns_Log_Uns,
            others => Iir_Predefined_None),
         Type_Int =>
            (Type_Unsigned =>
               Iir_Predefined_Ieee_Std_Logic_Arith_Add_Int_Uns_Uns,
             others => Iir_Predefined_None),
         Type_Log =>
            (Type_Unsigned =>
               Iir_Predefined_Ieee_Std_Logic_Arith_Add_Log_Uns_Uns,
             others => Iir_Predefined_None),
         others =>
           (others => Iir_Predefined_None)));

   Sub_Patterns : constant Bin_Pattern_Type :=
     (Type_Slv =>
        (Type_Unsigned =>
           (Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv,
            Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv,
            Type_Int =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv,
            Type_Log =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv),
         Type_Signed =>
           (Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv,
            Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv,
            Type_Int =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv,
            Type_Log =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv),
         Type_Int =>
           (Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv,
            Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv,
            others => Iir_Predefined_None),
         Type_Log =>
           (Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv,
            Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv,
            others => Iir_Predefined_None)),
      Type_Signed =>
        (Type_Signed =>
           (Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn,
            Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn,
            Type_Int =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn,
            Type_Log =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn),
         Type_Unsigned =>
           (Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn,
            others => Iir_Predefined_None),
         Type_Int =>
           (Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn,
            others => Iir_Predefined_None),
         Type_Log =>
           (Type_Signed =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn,
            others => Iir_Predefined_None)),
      Type_Unsigned =>
        (Type_Unsigned =>
           (Type_Unsigned =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns,
            Type_Int =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns,
            Type_Log =>
              Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns,
            others => Iir_Predefined_None),
         Type_Int =>
            (Type_Unsigned =>
               Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns,
             others => Iir_Predefined_None),
         Type_Log =>
            (Type_Unsigned =>
               Iir_Predefined_Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns,
             others => Iir_Predefined_None),
         others =>
           (others => Iir_Predefined_None)));

   Lt_Patterns : constant Cmp_Pattern_Type :=
     (Type_Unsigned =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Lt_Uns_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Lt_Uns_Sgn,
         Type_Int      => Iir_Predefined_Ieee_Std_Logic_Arith_Lt_Uns_Int),
      Type_Signed =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Lt_Sgn_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Lt_Sgn_Sgn,
         Type_Int      => Iir_Predefined_Ieee_Std_Logic_Arith_Lt_Sgn_Int),
      Type_Int =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Lt_Int_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Lt_Int_Sgn,
         others => Iir_Predefined_None));

   Le_Patterns : constant Cmp_Pattern_Type :=
     (Type_Unsigned =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Le_Uns_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Le_Uns_Sgn,
         Type_Int      => Iir_Predefined_Ieee_Std_Logic_Arith_Le_Uns_Int),
      Type_Signed =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Le_Sgn_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Le_Sgn_Sgn,
         Type_Int      => Iir_Predefined_Ieee_Std_Logic_Arith_Le_Sgn_Int),
      Type_Int =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Le_Int_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Le_Int_Sgn,
         others => Iir_Predefined_None));

   Gt_Patterns : constant Cmp_Pattern_Type :=
     (Type_Unsigned =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Gt_Uns_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Gt_Uns_Sgn,
         Type_Int      => Iir_Predefined_Ieee_Std_Logic_Arith_Gt_Uns_Int),
      Type_Signed =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Gt_Sgn_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Gt_Sgn_Sgn,
         Type_Int      => Iir_Predefined_Ieee_Std_Logic_Arith_Gt_Sgn_Int),
      Type_Int =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Gt_Int_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Gt_Int_Sgn,
         others => Iir_Predefined_None));

   Ge_Patterns : constant Cmp_Pattern_Type :=
     (Type_Unsigned =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Ge_Uns_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Ge_Uns_Sgn,
         Type_Int      => Iir_Predefined_Ieee_Std_Logic_Arith_Ge_Uns_Int),
      Type_Signed =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Ge_Sgn_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Ge_Sgn_Sgn,
         Type_Int      => Iir_Predefined_Ieee_Std_Logic_Arith_Ge_Sgn_Int),
      Type_Int =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Ge_Int_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Ge_Int_Sgn,
         others => Iir_Predefined_None));

   Eq_Patterns : constant Cmp_Pattern_Type :=
     (Type_Unsigned =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Eq_Uns_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Eq_Uns_Sgn,
         Type_Int      => Iir_Predefined_Ieee_Std_Logic_Arith_Eq_Uns_Int),
      Type_Signed =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Eq_Sgn_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Eq_Sgn_Sgn,
         Type_Int      => Iir_Predefined_Ieee_Std_Logic_Arith_Eq_Sgn_Int),
      Type_Int =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Eq_Int_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Eq_Int_Sgn,
         others => Iir_Predefined_None));

   Ne_Patterns : constant Cmp_Pattern_Type :=
     (Type_Unsigned =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Ne_Uns_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Ne_Uns_Sgn,
         Type_Int      => Iir_Predefined_Ieee_Std_Logic_Arith_Ne_Uns_Int),
      Type_Signed =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Ne_Sgn_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Ne_Sgn_Sgn,
         Type_Int      => Iir_Predefined_Ieee_Std_Logic_Arith_Ne_Sgn_Int),
      Type_Int =>
        (Type_Unsigned => Iir_Predefined_Ieee_Std_Logic_Arith_Ne_Int_Uns,
         Type_Signed   => Iir_Predefined_Ieee_Std_Logic_Arith_Ne_Int_Sgn,
         others => Iir_Predefined_None));

   Error : exception;

   procedure Extract_Declarations (Pkg : Iir_Package_Declaration)
   is
      procedure Classify_Arg (Arg : Iir; Kind : out Arg_Kind)
      is
         Arg_Type : constant Iir := Get_Type (Arg);
      begin
         if Arg_Type = Signed_Type then
            Kind := Type_Signed;
         elsif Arg_Type = Unsigned_Type then
            Kind := Type_Unsigned;
         elsif Arg_Type = Vhdl.Std_Package.Integer_Subtype_Definition then
            Kind := Type_Int;
         elsif Arg_Type = Ieee.Std_Logic_1164.Std_Ulogic_Type then
            Kind := Type_Log;
         elsif Arg_Type = Ieee.Std_Logic_1164.Std_Logic_Vector_Type then
            Kind := Type_Slv;
         else
            raise Error;
         end if;
      end Classify_Arg;

      Decl : Iir;
      Type_Def : Iir;

      Arg1, Arg2 : Iir;
      Arg1_Kind, Arg2_Kind : Arg_Kind;
      Res_Kind : Arg_Kind;

      function Handle_Conv (Pats : Conv_Pattern_Type)
                           return Iir_Predefined_Functions is
      begin
         if Arg2_Kind /= Type_Int then
            raise Error;
         end if;
         return Pats (Arg1_Kind);
      end Handle_Conv;

      function Handle_Bin (Pats : Bin_Pattern_Type)
                          return Iir_Predefined_Functions is
      begin
         return Pats (Res_Kind, Arg1_Kind, Arg2_Kind);
      end Handle_Bin;

      function Handle_Cmp (Pats : Cmp_Pattern_Type)
                          return Iir_Predefined_Functions is
      begin
         return Pats (Arg1_Kind, Arg2_Kind);
      end Handle_Cmp;

      Def : Iir_Predefined_Functions;
   begin
      Decl := Get_Declaration_Chain (Pkg);

      if Decl /= Null_Iir
        and then Get_Kind (Decl) = Iir_Kind_Use_Clause
      then
         --  Mentor version.  Don't extract and don't crash.
         return;
      end if;

      --  The first declaration should be type Unsigned.
      if not (Decl /= Null_Iir
                and then Get_Kind (Decl) = Iir_Kind_Type_Declaration
                and then Get_Identifier (Decl) = Name_Unsigned)
      then
         raise Error;
      end if;

      Type_Def := Get_Type_Definition (Decl);
      if Get_Kind (Type_Def) /= Iir_Kind_Array_Type_Definition then
         raise Error;
      end if;
      Unsigned_Type := Type_Def;

      --  The second declaration should be type Signed.
      Decl := Get_Chain (Decl);
      Decl := Skip_Implicit (Decl);
      if not (Decl /= Null_Iir
                and then Get_Kind (Decl) = Iir_Kind_Type_Declaration
                and then Get_Identifier (Decl) = Name_Signed)
      then
         raise Error;
      end if;

      Type_Def := Get_Type_Definition (Decl);
      if Get_Kind (Type_Def) /= Iir_Kind_Array_Type_Definition then
         raise Error;
      end if;
      Signed_Type := Type_Def;

      --  Skip subtypes
      Decl := Get_Chain (Decl);
      Decl := Skip_Implicit (Decl);
      while Is_Valid (Decl) loop
         exit when Get_Kind (Decl) /= Iir_Kind_Subtype_Declaration;
         Decl := Get_Chain (Decl);
      end loop;

      --  Handle functions.
      while Is_Valid (Decl) loop
         Def := Iir_Predefined_None;

         case Get_Kind (Decl) is
            when Iir_Kind_Function_Declaration =>
               Arg1 := Get_Interface_Declaration_Chain (Decl);
               if Is_Null (Arg1) then
                  raise Error;
               end if;

               Classify_Arg (Arg1, Arg1_Kind);
               Arg2 := Get_Chain (Arg1);
               if Is_Valid (Arg2) then
                  --  Dyadic function.
                  Classify_Arg (Arg2, Arg2_Kind);

                  case Get_Identifier (Decl) is
                     when Name_Op_Plus =>
                        Classify_Arg (Decl, Res_Kind);
                        Def := Handle_Bin (Add_Patterns);
                     when Name_Op_Minus =>
                        Classify_Arg (Decl, Res_Kind);
                        Def := Handle_Bin (Sub_Patterns);
                     when Name_Op_Mul =>
                        Classify_Arg (Decl, Res_Kind);
                        Def := Handle_Bin (Mul_Patterns);
                     when Name_Conv_Unsigned =>
                        Def := Handle_Conv (Conv_Uns_Patterns);
                     when Name_Conv_Std_Logic_Vector =>
                        Def := Handle_Conv (Conv_Vec_Patterns);
                     when Name_Op_Less =>
                        Def := Handle_Cmp (Lt_Patterns);
                     when Name_Op_Less_Equal =>
                        Def := Handle_Cmp (Le_Patterns);
                     when Name_Op_Greater =>
                        Def := Handle_Cmp (Gt_Patterns);
                     when Name_Op_Greater_Equal =>
                        Def := Handle_Cmp (Ge_Patterns);
                     when Name_Op_Equality =>
                        Def := Handle_Cmp (Eq_Patterns);
                     when Name_Op_Inequality =>
                        Def := Handle_Cmp (Ne_Patterns);
                     when Name_Ext =>
                        if Arg1_Kind /= Type_Slv or Arg2_Kind /= Type_Int then
                           raise Error;
                        end if;
                        Def := Iir_Predefined_Ieee_Std_Logic_Arith_Ext;
                     when Name_Sxt =>
                        if Arg1_Kind /= Type_Slv or Arg2_Kind /= Type_Int then
                           raise Error;
                        end if;
                        Def := Iir_Predefined_Ieee_Std_Logic_Arith_Sxt;
                     when others =>
                        null;
                  end case;
               else
                  --  Monadic function.
                  case Get_Identifier (Decl) is
                     when Name_Conv_Integer =>
                        Def := Conv_Int_Patterns (Arg1_Kind);
                     when others =>
                        null;
                  end case;
               end if;

            when Iir_Kind_Non_Object_Alias_Declaration
              | Iir_Kind_Procedure_Declaration =>
               null;

            when others =>
               raise Error;
         end case;
         Set_Implicit_Definition (Decl, Def);

         Decl := Get_Chain (Decl);
      end loop;
   exception
      when Error =>
         Error_Msg_Sem (+Pkg, "package ieee.std_logic_arith is ill-formed");
   end Extract_Declarations;
end Vhdl.Ieee.Std_Logic_Arith;