| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | simul: do not link with fst or vpi c files | Tristan Gingold | 2023-01-05 | 1 | -5/+6 |
| * | elab-vhdl_debug: makes work and std visible | Tristan Gingold | 2023-01-05 | 1 | -4/+17 |
| * | synth: handle generic mapped packages | Tristan Gingold | 2023-01-05 | 2 | -2/+10 |
| * | elab-debugger: fix crash on backtrace in concurrent statement | Tristan Gingold | 2023-01-05 | 1 | -2/+4 |
| * | grt: add modules in ghdl_main instead of grt-main | Tristan Gingold | 2023-01-05 | 4 | -7/+9 |
| * | synth-vhdl_decls: manually elaborate protected type body | Tristan Gingold | 2023-01-04 | 2 | -6/+27 |
| * | vhdl-sem_expr: extract is_expression | Tristan Gingold | 2023-01-04 | 2 | -18/+30 |
| * | vhdl-errors(disp_node): fix a crash on protected type body | Tristan Gingold | 2023-01-04 | 1 | -1/+2 |
| * | synth: detect null access dereference, fix offset. | Tristan Gingold | 2023-01-04 | 2 | -4/+19 |
| * | elab-vhdl_debug: avoid a crash on error in print | Tristan Gingold | 2023-01-04 | 1 | -5/+9 |
| * | elab-vhdl_debug: handle protected type body, nested packages | Tristan Gingold | 2023-01-04 | 1 | -5/+11 |
| * | elab-vhdl_debug: add pheap command, improve access display | Tristan Gingold | 2023-01-04 | 1 | -1/+32 |
| * | elab-debugger: improve backtrace, source display | Tristan Gingold | 2023-01-04 | 1 | -6/+19 |
| * | synth-ieee-numeric_std: avoid a crash on mul with meta-values | Tristan Gingold | 2023-01-04 | 1 | -19/+29 |
| * | vhdl-sem_inst: handle suspend_state | Tristan Gingold | 2023-01-04 | 6 | -186/+293 |
| * | ghdlsimul: do late semantic checks | Tristan Gingold | 2023-01-04 | 1 | -1/+19 |
| * | synth: check length of selector in case statement | Tristan Gingold | 2023-01-04 | 1 | -0/+4 |
| * | synth: fix handling of target aggregate in conditional variable assignment | Tristan Gingold | 2023-01-04 | 1 | -3/+4 |
| * | simul: handle force/release signal assignments | Tristan Gingold | 2023-01-03 | 6 | -18/+221 |
| * | synth: handle more 2008 aggregates | Tristan Gingold | 2023-01-03 | 3 | -11/+43 |
| * | synth-vhdl_aggr: minor renaming | Tristan Gingold | 2023-01-03 | 1 | -8/+9 |
| * | synth: introduce type_array_unbounded | Tristan Gingold | 2023-01-03 | 13 | -48/+143 |
| * | synth: fix handling of record subtypes for objects | Tristan Gingold | 2023-01-03 | 1 | -0/+1 |
| * | synth: adjust exec_name_subtype for function calls | Tristan Gingold | 2023-01-03 | 1 | -0/+7 |
| * | simul: skip psl default clock in declarations | Tristan Gingold | 2023-01-03 | 1 | -0/+1 |
| * | synth: add support of interface subprogram | Tristan Gingold | 2023-01-03 | 3 | -31/+33 |
| * | synth: improve support of vhdl-08 arrays | Tristan Gingold | 2023-01-02 | 3 | -13/+40 |
| * | synth: fix to_string for character | Tristan Gingold | 2023-01-02 | 2 | -1/+12 |
| * | synth: add support for nested packages | Tristan Gingold | 2023-01-02 | 3 | -19/+87 |
| * | synth: elaborate case generate statements | Tristan Gingold | 2023-01-01 | 6 | -18/+74 |
| * | simul: handle nested packages | Tristan Gingold | 2023-01-01 | 3 | -1/+19 |
| * | trans-chap7: handle unbounded expressions in aggregates. | Tristan Gingold | 2022-12-31 | 1 | -24/+39 |
| * | elab-vhdl_expr: fix a crash on simple aggregate | Tristan Gingold | 2022-12-31 | 1 | -8/+2 |
| * | synth: handle string literals in debug | Tristan Gingold | 2022-12-31 | 1 | -1/+2 |
| * | synth: add statement in context, adjust path/instance name attributes | Tristan Gingold | 2022-12-31 | 10 | -43/+92 |
| * | grt-files_operations: allow last line without EOL | Tristan Gingold | 2022-12-31 | 1 | -1/+4 |
| * | synth: check bounds for pos and val attributes | Tristan Gingold | 2022-12-26 | 1 | -3/+10 |
| * | synth: improve support of value attribute | Tristan Gingold | 2022-12-26 | 3 | -6/+40 |
| * | simul: handle driving and driving_value attributes | Tristan Gingold | 2022-12-26 | 5 | -8/+66 |
| * | synth: handle instance_name attribute | Tristan Gingold | 2022-12-26 | 5 | -9/+115 |
| * | synth: add support for numeric_std_unsigned add, sub, fix #2286 | tmeissner | 2022-12-26 | 1 | -2/+8 |
| * | synth: add support for to_x01z. Fix #2285 | Tristan Gingold | 2022-12-26 | 1 | -1/+3 |
| * | simul: handle transaction attribute | Tristan Gingold | 2022-12-26 | 2 | -3/+13 |
| * | simul: allow unassigned top generics | Tristan Gingold | 2022-12-26 | 2 | -3/+9 |
| * | simul: handle aggregate is guarded signal assignment target | Tristan Gingold | 2022-12-26 | 1 | -7/+29 |
| * | vhdl-canon: handle unaffected | Tristan Gingold | 2022-12-26 | 2 | -0/+6 |
| * | synth: add value_sig_val to handle individual signal associations | Tristan Gingold | 2022-12-26 | 12 | -51/+294 |
| * | synth-vhdl_stmts(Aggregate_Array_Extract): fix offset for vector extraction | Tristan Gingold | 2022-12-26 | 1 | -1/+2 |
| * | vhdl-sem_stmts: simplify code, add comments | Tristan Gingold | 2022-12-23 | 1 | -27/+5 |
| * | vhdl-sem_inst: avoid a crash after error on package instantiation | Tristan Gingold | 2022-12-23 | 1 | -0/+2 |
