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* psl-rewrites: handle N_Paren_Prop (simply discard).Tristan Gingold2020-03-131-0/+3
* synth: handle div/rem/mod operations. Fix #1157Tristan Gingold2020-03-132-60/+79
* synth-stmts: strip const in if statement.Tristan Gingold2020-03-131-0/+1
* synth-static_oper: handle unsigned "<".Tristan Gingold2020-03-132-1/+66
* synth-insts: handle record in generics.Tristan Gingold2020-03-132-23/+57
* synth-static_oper: handle static net for add_uns_nat.Tristan Gingold2020-03-131-5/+14
* netlists: handle more case of 0 sized nets.Tristan Gingold2020-03-133-3/+5
* synth-insts: handle output individual assoc for components.Tristan Gingold2020-03-131-18/+3
* synth-insts: handle input individual associations for components.Tristan Gingold2020-03-131-55/+49
* synth: propagate more errors.Tristan Gingold2020-03-133-1/+11
* vhdl-scanner: abstract Scan_Comment_PragmaTristan Gingold2020-03-131-32/+40
* synth-expr: handle reverse_range attribute.Tristan Gingold2020-03-131-0/+22
* synth: handle conversions for enumerations.Tristan Gingold2020-03-131-1/+6
* psl: keep denoting names in the PSL ast.Tristan Gingold2020-03-1319-40/+129
* vhdl-sem_lib: also disable warnings when parsingTristan Gingold2020-03-111-10/+17
* synth-expr: propagate error.Tristan Gingold2020-03-111-0/+3
* synth: implement more conversions.Tristan Gingold2020-03-114-41/+50
* vhdl-ieee-std_logic_arith: recognize more conversions.Tristan Gingold2020-03-114-6/+21
* synth: improve error message.Tristan Gingold2020-03-112-2/+2
* vhdl-ieee-std_logic_unsigned: recognize more operations.Tristan Gingold2020-03-112-0/+17
* synth: improve error handling.Tristan Gingold2020-03-114-26/+81
* vhdl: recognize mod/rem operators.Tristan Gingold2020-03-102-0/+54
* synth-oper: handle more mul & div operations.Tristan Gingold2020-03-101-4/+84
* synth-values: handle Is_Equal for floats.Tristan Gingold2020-03-101-0/+2
* synth-oper: handle minimum, maximum for integers.Tristan Gingold2020-03-101-0/+19
* synth: handle memories in inout variable parameter.Tristan Gingold2020-03-102-14/+24
* synth-stmts: handle conditional assignment without elseTristan Gingold2020-03-101-1/+13
* synth-oper: handle slice of non-vector.Tristan Gingold2020-03-101-4/+2
* ghdlmain: minor refactoring.Tristan Gingold2020-03-102-18/+2
* synthesis: add option --vendor-library= for synthesis.Tristan Gingold2020-03-1010-260/+366
* netlists-cleanup: avoid a warning.Tristan Gingold2020-03-101-0/+1
* synth-static_oper: handle and, or.Tristan Gingold2020-03-091-2/+19
* synth-static_oper: generalize "not".Tristan Gingold2020-03-091-1/+2
* netlists: allow empty net for build_mux4Tristan Gingold2020-03-091-1/+0
* synthesis: handle slice of dynamic array.Tristan Gingold2020-03-091-4/+1
* synthesis: handle array in record.Tristan Gingold2020-03-091-8/+1
* synth: avoid crash on bad elaboration order.Tristan Gingold2020-03-091-1/+3
* synth-stmts: do not limit to 32 state bits for PSLTristan Gingold2020-03-091-1/+0
* vhdl-formatters: minor refactoring.Tristan Gingold2020-03-091-19/+26
* synth-oper: use mask to handle ?= and ?/=.Tristan Gingold2020-03-091-26/+69
* synth-oper: refactoring for std_match.Tristan Gingold2020-03-091-81/+91
* synth: handle user-defined operator call.Tristan Gingold2020-03-083-107/+202
* synth-static_oper: handle const operands for enums.Tristan Gingold2020-03-071-3/+6
* vhdl-configuration: avoid crash on parse error.Tristan Gingold2020-03-071-2/+5
* synth-stmts: handle constant if statements.Tristan Gingold2020-03-071-0/+1
* netlists-builders: handle null operands for dyadic operations.Tristan Gingold2020-03-071-1/+0
* netlists-expands: fix dyn_insert_en (en was missing). Fix #1155Tristan Gingold2020-03-072-1/+4
* synthesis: handle initialized output ports.Tristan Gingold2020-03-077-25/+72
* netlists-disp_vhdl: handle xnor. Fix #1153Tristan Gingold2020-03-071-0/+2
* vhdl-parse: avoid resync_to_end_of_statement.Tristan Gingold2020-03-061-0/+2