| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | synth-vhdl_aggr: fix mismatch. Fix #1962 | Tristan Gingold | 2022-02-05 | 1 | -1/+6 |
| * | synth: fix handling of std_logic_unsigned."-" for negative numbers. | Tristan Gingold | 2022-01-18 | 1 | -8/+12 |
| * | errorout-console: check for TERM=dumb for colorize autodetect. Fix #1950 | Tristan Gingold | 2022-01-17 | 1 | -14/+30 |
| * | synth: adjust handling of subprogram calls in package instantiation. Fix #1947 | Tristan Gingold | 2022-01-16 | 1 | -3/+14 |
| * | synth: do not annotate generic types in package. Fix #1949 | Tristan Gingold | 2022-01-15 | 2 | -12/+23 |
| * | vhdl: add comments | Tristan Gingold | 2022-01-15 | 1 | -1/+6 |
| * | synth: handle macro-expanded package body. Fix #1948 | Tristan Gingold | 2022-01-14 | 3 | -6/+16 |
| * | synth: handle alias of alias. Fix #1945 | Tristan Gingold | 2022-01-12 | 1 | -2/+15 |
| * | synth: refine handling of interface type. Fix #1944 | Tristan Gingold | 2022-01-10 | 2 | -8/+22 |
| * | trans-chap2.adb: handle Kind_Component in Copy_Info. Fix #1943 | Tristan Gingold | 2022-01-09 | 1 | -1/+8 |
| * | vhdl-sem_types: handle record in reparse_as_array_constraint. Fix #1934 | Tristan Gingold | 2022-01-09 | 1 | -0/+3 |
| * | synth: ignore use clauses in finalization Fix #1942 | Tristan Gingold | 2022-01-05 | 1 | -0/+2 |
| * | synth: handle package instantiation in declarations. Fix #1938 | Tristan Gingold | 2022-01-03 | 4 | -1/+12 |
| * | vhdl-sem_decls: copy subtype indication also for files. Fix #1936 | Tristan Gingold | 2021-12-28 | 1 | -0/+3 |
| * | dyn_maps: add Get_Index_Soft. | Tristan Gingold | 2021-12-28 | 2 | -12/+50 |
| * | synth: add assertions | Tristan Gingold | 2021-12-19 | 1 | -0/+4 |
| * | ghdldrv: fix crash due to double initialization | Tristan Gingold | 2021-12-19 | 2 | -2/+3 |
| * | synth: handle interface type in generics. For #412 | Tristan Gingold | 2021-12-15 | 4 | -28/+49 |
| * | mcode: generate and register .eh_frame on linux x86/64 | Tristan Gingold | 2021-12-14 | 14 | -11/+179 |
| * | ghdldrv: handle generic overrides on foreign units | Tristan Gingold | 2021-12-13 | 4 | -50/+75 |
| * | vhdl-sem_expr.adb: avoid a crash after forced analysis | Tristan Gingold | 2021-12-13 | 1 | -1/+2 |
| * | Fix opening files relative to the current vhdl | Matt Johnston | 2021-12-07 | 1 | -0/+2 |
| * | synth: add --latches option to enable latches. Fix #938 | Tristan Gingold | 2021-12-06 | 3 | -1/+11 |
| * | vhdl-sem.adb: fix incorrect check for conformance rules | Tristan Gingold | 2021-12-03 | 1 | -1/+3 |
| * | synth/elab-vhdl_expr: handle slices and indexed names. Fix #1926 | Tristan Gingold | 2021-11-29 | 1 | -19/+11 |
| * | synth memories: also accept constant signal as memory initial value | Tristan Gingold | 2021-11-28 | 2 | -4/+9 |
| * | elab-vhdl_objtypes.adb: add an assertion | Tristan Gingold | 2021-11-28 | 1 | -0/+2 |
| * | elab-vhdl_insts.adb: do not try to elaborate foreign instances twice | Tristan Gingold | 2021-11-28 | 1 | -1/+6 |
| * | synth: adjustments for foreign_module | Tristan Gingold | 2021-11-28 | 2 | -3/+12 |
| * | synth: add a hook to resolve foreign instantiation names | Tristan Gingold | 2021-11-28 | 2 | -0/+8 |
| * | synth-vhdl_insts.adb: split synth_Instantiate_Module | Tristan Gingold | 2021-11-28 | 1 | -14/+26 |
| * | synth: add hooks to support elaboration of foreign instances | Tristan Gingold | 2021-11-28 | 10 | -32/+108 |
| * | vhdl-parse: improve error message for empty records | Tristan Gingold | 2021-11-28 | 1 | -29/+33 |
| * | vhdl/translate: handle target aggregate with unbounded names. Fix #1914 | Tristan Gingold | 2021-11-24 | 4 | -22/+75 |
| * | vhdl-sem_decls: avoid a crash on invalid alias name. Fix #1919 | Tristan Gingold | 2021-11-21 | 1 | -0/+10 |
| * | synth-vhdl_expr: emit an error if use of a signal during elaboration. Fix #1920 | Tristan Gingold | 2021-11-21 | 1 | -0/+7 |
| * | synth: put direction into port desc | Tristan Gingold | 2021-11-17 | 8 | -31/+30 |
| * | synth: use a global table for instances attributes | Tristan Gingold | 2021-11-17 | 6 | -168/+117 |
| * | synth: renaming to instance_attributes. | Tristan Gingold | 2021-11-17 | 11 | -66/+72 |
| * | synth/netlists-disp_verilog: display port attributes | Tristan Gingold | 2021-11-17 | 1 | -18/+42 |
| * | synth: add ports attributes | Tristan Gingold | 2021-11-17 | 3 | -0/+120 |
| * | vhdl-utils.adb: minor refactoring | Tristan Gingold | 2021-11-17 | 1 | -7/+3 |
| * | grt: refactoring to fix build failure. For #1913 | Tristan Gingold | 2021-11-17 | 5 | -394/+443 |
| * | Add comments | Tristan Gingold | 2021-11-17 | 2 | -0/+4 |
| * | vhdl-evaluation: use grt to compute value attribute for integers. | Tristan Gingold | 2021-11-17 | 3 | -33/+97 |
| * | grt/Makefile.inc: add a dependency for grt-cgnatrts. | Tristan Gingold | 2021-11-16 | 1 | -2/+3 |
| * | synth: defer instantations elaboration to handle recursion. Fix #1912 | Tristan Gingold | 2021-11-16 | 2 | -15/+110 |
| * | vhdl-evaluation: catch bad parameter for value attribute. Fix #1913 | Tristan Gingold | 2021-11-15 | 1 | -1/+7 |
| * | vhdl-sem_expr: improve code generation for multi-dim aggregates | Tristan Gingold | 2021-11-15 | 1 | -3/+3 |
| * | synth: handle syn_black_box attribute in vhdl architectures | Tristan Gingold | 2021-11-13 | 1 | -10/+75 |
