| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | libghdlsynth: make it almost empty, as libghdl will be used instead. | Tristan Gingold | 2019-08-13 | 1 | -8/+0 |
| * | Support for PSL assert and assume in synthesis (#892) | Pepijn de Vos | 2019-08-13 | 1 | -4/+53 |
| * | libghdl: also add synthesis part. For #884 | Tristan Gingold | 2019-08-13 | 6 | -52/+56 |
| * | synth: build_header was replaced by a Makefile target. | Tristan Gingold | 2019-08-13 | 1 | -8/+0 |
| * | libghdl: preliminary work to also support synth. | Tristan Gingold | 2019-08-13 | 2 | -4/+9 |
| * | vhdl: improve reprint of inertial association. | Tristan Gingold | 2019-08-11 | 6 | -181/+206 |
| * | vhdl-sem: fix minor thinko for sem_insert_anonymous_signal. | Tristan Gingold | 2019-08-11 | 1 | -1/+24 |
| * | vhdl: avoid crash on incorrect unit name. | Tristan Gingold | 2019-08-10 | 2 | -6/+36 |
| * | vhdl: handle subtype indication (with range) in discrete_range. | Tristan Gingold | 2019-08-10 | 7 | -63/+105 |
| * | synth: add comments. | Tristan Gingold | 2019-08-09 | 1 | -1/+9 |
| * | vhdl: remove unused Get/Set_Choice_Order. | Tristan Gingold | 2019-08-09 | 5 | -304/+247 |
| * | synth: fix crash when assignment target is an aggregate. | Tristan Gingold | 2019-08-08 | 1 | -5/+7 |
| * | vhdl: remove -Whides warnings for processes without a label. | Tristan Gingold | 2019-08-08 | 1 | -0/+9 |
| * | synth: handle 1 bit integer in disp_vhdl, fix range in synth-expr. | Tristan Gingold | 2019-08-08 | 2 | -4/+13 |
| * | vhdl: remove severity from cover, report and severity from assume. | Tristan Gingold | 2019-08-08 | 11 | -142/+160 |
| * | vhdl-nodes: gather PSL nodes, regenerate nodes_meta. | Tristan Gingold | 2019-08-07 | 2 | -125/+91 |
| * | Add support for PSL assumptions, used in formal verification (#880) | Pepijn de Vos | 2019-08-07 | 30 | -141/+334 |
| * | vhdl: allow discrete subtype indication for discrete_range. | Tristan Gingold | 2019-08-06 | 5 | -45/+53 |
| * | vhdl: for time resolution, do not consider unit name from textio body. | Tristan Gingold | 2019-08-06 | 2 | -10/+38 |
| * | synth: improve support of vhdl08. Fix #882 | Tristan Gingold | 2019-08-05 | 2 | -5/+22 |
| * | synth: add asserts in synth-values | Tristan Gingold | 2019-08-05 | 1 | -0/+5 |
| * | synth: handle subtype conversions. | Tristan Gingold | 2019-08-05 | 5 | -73/+154 |
| * | synth: handle signed conversions in disp_vhdl. | Tristan Gingold | 2019-08-05 | 1 | -2/+6 |
| * | synth: preliminary support of integer literals. | Tristan Gingold | 2019-08-02 | 2 | -18/+67 |
| * | synth: add a debug procedure. | Tristan Gingold | 2019-08-02 | 2 | -0/+22 |
| * | synth: improve error message for multiple assignments. | Tristan Gingold | 2019-08-02 | 1 | -4/+20 |
| * | synth: handle signed integer comparisons (#878) | Pepijn de Vos | 2019-08-01 | 3 | -0/+43 |
| * | synth: handle partial assignments in a process (WIP). | Tristan Gingold | 2019-08-01 | 1 | -18/+75 |
| * | synth: refactoring in inference/environment. | Tristan Gingold | 2019-08-01 | 3 | -7/+13 |
| * | synth: refactor inference, add comment, strengthen check. | Tristan Gingold | 2019-08-01 | 4 | -31/+62 |
| * | synth: refactoring in synth-inference. | Tristan Gingold | 2019-07-31 | 1 | -129/+137 |
| * | synth: add location on monadic operators. | Tristan Gingold | 2019-07-31 | 1 | -7/+10 |
| * | synth: regenerate ghdlsynth_gates.h | Tristan Gingold | 2019-07-31 | 1 | -3/+4 |
| * | synth: fix a crash in instantiation. | Tristan Gingold | 2019-07-31 | 2 | -8/+9 |
| * | synth: slightly improve output for indexes. | Tristan Gingold | 2019-07-30 | 1 | -3/+7 |
| * | synth: adjust output for dyn_insert, add dpram2 test. | Tristan Gingold | 2019-07-30 | 1 | -2/+2 |
| * | synth: fixes for indexed names. | Tristan Gingold | 2019-07-30 | 3 | -3/+13 |
| * | synth: rework indexed names. | Tristan Gingold | 2019-07-30 | 4 | -101/+106 |
| * | synth: handle more conversions in disp_vhdl | Tristan Gingold | 2019-07-29 | 1 | -1/+44 |
| * | synth: add support for memories. | Tristan Gingold | 2019-07-29 | 15 | -152/+445 |
| * | synth: remove extract_bound (trivial). | Tristan Gingold | 2019-07-28 | 5 | -15/+6 |
| * | synth: unconstrained arrays. | Tristan Gingold | 2019-07-28 | 5 | -17/+71 |
| * | synth: preliminary support of dynamic indexing. | Tristan Gingold | 2019-07-28 | 13 | -740/+956 |
| * | vhdl: linearize analyze and evaluation of concat operators. | Tristan Gingold | 2019-07-26 | 5 | -360/+647 |
| * | synth: rework range. | Tristan Gingold | 2019-07-26 | 5 | -48/+52 |
| * | synth: preliminary support of integer subtypes. | Tristan Gingold | 2019-07-26 | 8 | -42/+68 |
| * | synth: handle array aggregate. | Tristan Gingold | 2019-07-26 | 2 | -27/+32 |
| * | synth: handle bit. | Tristan Gingold | 2019-07-25 | 3 | -4/+11 |
| * | synth: array inequality, integer in choices. | Tristan Gingold | 2019-07-25 | 2 | -0/+11 |
| * | vhdl+synth: recognize /= to std_logic_unsigned. | Tristan Gingold | 2019-07-25 | 3 | -1/+16 |
