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* synth: handle package bodies.Tristan Gingold2019-10-071-0/+1
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* vhdl: recognize to_bitvector.Tristan Gingold2019-10-072-81/+74
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* synth: add support for concurrent procedure calls. Fix #969Tristan Gingold2019-10-071-1/+2
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* Rework errors handling, to have a more generic framework.Tristan Gingold2019-10-062-4/+61
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* synth: improve support of arrays or arrays. Fix #955Tristan Gingold2019-10-011-13/+8
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* vhdl: recognize div operators.Tristan Gingold2019-09-302-0/+27
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* vhdl-std_package: reduce cascaded error messages.Tristan Gingold2019-09-301-0/+1
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* vhdl: recognize rotate functions.Tristan Gingold2019-09-222-0/+17
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* synth: handle record subtypes.Tristan Gingold2019-09-191-5/+8
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* vhdl: add exit/next flags.Tristan Gingold2019-09-185-63/+173
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* vhdl-nodes: add a comment.Tristan Gingold2019-09-121-1/+1
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* vhdl-ieee-numeric: recognize shift_right.Tristan Gingold2019-09-111-17/+31
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* vhdl: recognize numeric_std shift_left.Tristan Gingold2019-09-112-0/+24
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* vhdl: recognize numeric_std mul.Tristan Gingold2019-09-072-0/+27
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* vhdl: fix unused warning on protected variable.Tristan Gingold2019-09-061-0/+1
| | | | Fix ghdl/ghdl-language-server#27
* vhdl: handle P32 in connect_scalar. Fix #918Tristan Gingold2019-09-051-1/+2
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* vhdl: do not crash on attribute with a type conversion prefix.Tristan Gingold2019-09-041-2/+3
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* vhdl: renames Conditional_Expression to Conditional_Expression_Chain.Tristan Gingold2019-09-028-37/+40
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* vhdl synth: recognize more operators (add uns log).Tristan Gingold2019-09-022-2/+6
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* vhdl-annotations: ignore conditional variable assignment.Tristan Gingold2019-08-301-1/+2
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* vhdl-annotate: handle shared anonymous subtype in interfaces.Tristan Gingold2019-08-301-1/+4
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* vhdl: recognize ieee.numeric_std std_match.Tristan Gingold2019-08-302-0/+39
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* vhdl: recognize 1164 condition operator, handle in synth.Tristan Gingold2019-08-302-5/+17
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* synth: add support for record types.Tristan Gingold2019-08-291-0/+4
| | | | (WIP: need to fix regression of stmt01).
* synth: support sequential conditional signal assignment.Tristan Gingold2019-08-271-0/+1
| | | | Fix tgingold/ghdlsynth-beta#40
* ignore restrict in simulation (#897)Pepijn de Vos2019-08-202-18/+17
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* initial support for reduce and/or (#900)Pepijn de Vos2019-08-202-5/+22
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* vhdl psl: fully scan PSL keywords in scanner.Tristan Gingold2019-08-206-66/+141
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* vhdl-prints: handle architecture in verification unit hierarchical name.Tristan Gingold2019-08-201-0/+7
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* vhdl: handle architecture in verification unit hierarchical name.Tristan Gingold2019-08-203-13/+53
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* vhdl-prints: handle verification units.Tristan Gingold2019-08-201-318/+354
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* vhdl: handle assume in verification units.Tristan Gingold2019-08-204-1/+9
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* synth: handle verification units.Tristan Gingold2019-08-209-244/+411
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* vhdl: parse verification unit (WIP).Tristan Gingold2019-08-1714-348/+530
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* vhdl: declare verification units (WIP).Tristan Gingold2019-08-1611-280/+549
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* vhdl: recognize PSL units reserved words.Tristan Gingold2019-08-163-0/+15
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* add synthesis support for logic operators on numeric types (#893)Pepijn de Vos2019-08-152-0/+114
| | | | | | | | * add logic operators on unsigned * handle signed too * handle unary not
* vhdl: handle PSL keywords as vhdl08 reserved words; switch to PSL scanner mode.Tristan Gingold2019-08-141-0/+9
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* vhdl: add PSL keywords to vhdl08 reserved words.Tristan Gingold2019-08-147-78/+98
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* vhdl-nodes_walk: handle iir_kind_psl_default_clock.Tristan Gingold2019-08-131-1/+2
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* libghdl: also add synthesis part. For #884Tristan Gingold2019-08-131-0/+2
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* libghdl: preliminary work to also support synth.Tristan Gingold2019-08-132-4/+9
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* vhdl: improve reprint of inertial association.Tristan Gingold2019-08-116-181/+206
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* vhdl-sem: fix minor thinko for sem_insert_anonymous_signal.Tristan Gingold2019-08-111-1/+24
| | | | Fix #885
* vhdl: avoid crash on incorrect unit name.Tristan Gingold2019-08-102-6/+36
| | | | Fix #886
* vhdl: handle subtype indication (with range) in discrete_range.Tristan Gingold2019-08-107-63/+105
| | | | For #877
* vhdl: remove unused Get/Set_Choice_Order.Tristan Gingold2019-08-095-304/+247
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* vhdl: remove -Whides warnings for processes without a label.Tristan Gingold2019-08-081-0/+9
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* vhdl: remove severity from cover, report and severity from assume.Tristan Gingold2019-08-089-131/+154
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* vhdl-nodes: gather PSL nodes, regenerate nodes_meta.Tristan Gingold2019-08-072-125/+91
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