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author | Tristan Gingold <tgingold@free.fr> | 2019-09-18 20:20:24 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-09-19 06:32:17 +0200 |
commit | abcd3c1130fe8504fcc0dc31f1b7e031ee7a5fcf (patch) | |
tree | ca746e272057434b80a1ba723c38876fbf1a1012 /src/vhdl | |
parent | acac3f18888c0989ae4d7d8a4fb20a90edc2a38c (diff) | |
download | ghdl-abcd3c1130fe8504fcc0dc31f1b7e031ee7a5fcf.tar.gz ghdl-abcd3c1130fe8504fcc0dc31f1b7e031ee7a5fcf.tar.bz2 ghdl-abcd3c1130fe8504fcc0dc31f1b7e031ee7a5fcf.zip |
synth: handle record subtypes.
Diffstat (limited to 'src/vhdl')
-rw-r--r-- | src/vhdl/vhdl-annotations.adb | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index 0b15f37b0..a2f0f0458 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -410,10 +410,6 @@ package body Vhdl.Annotations is end if; when Iir_Kind_Record_Type_Definition => - if Flag_Synthesis then - -- For the offsets. - Create_Object_Info (Block_Info, Def, Kind_Type); - end if; declare List : constant Iir_Flist := Get_Elements_Declaration_List (Def); @@ -424,9 +420,16 @@ package body Vhdl.Annotations is (Block_Info, Get_Type (El)); end loop; end; + if Flag_Synthesis then + -- For the offsets. + Create_Object_Info (Block_Info, Def, Kind_Type); + end if; when Iir_Kind_Record_Subtype_Definition => - null; + if Flag_Synthesis then + -- For the offsets. + Create_Object_Info (Block_Info, Def, Kind_Type); + end if; when Iir_Kind_Access_Type_Definition => Annotate_Anonymous_Type_Definition |