iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	vhdl-errors(disp_node): fix a crash on protected type body	Tristan Gingold	2023-01-04	1	-1/+2
*	vhdl: add iir_kind_psl_boolean_parameter node. For #2178	Tristan Gingold	2022-08-15	1	-0/+2
*	vhdl: add support for file subtype. Fix #2174	Tristan Gingold	2022-08-11	1	-0/+2
*	vhdl-nodes: renaming.	Tristan Gingold	2022-07-21	1	-2/+2
*	vhdl-errors.adb: use normal message subprogram. For #2070	Tristan Gingold	2022-06-01	1	-9/+1
*	vhdl: add suspend state pseudo decl and stmt. WIP.	Tristan Gingold	2022-05-17	1	-0/+6
*	vhdl-errors(disp_node): change message for generate body	Tristan Gingold	2022-05-14	1	-1/+1
*	vhdl: Iir_Kind_Foreign_Module is now a library unit	Tristan Gingold	2021-11-09	1	-0/+2
*	vhdl: parse PSL inherit spec. For #1899	Tristan Gingold	2021-11-04	1	-0/+2
*	vhdl: remove iir_kind_anonymous_signal_declaration (now unused)	Tristan Gingold	2021-08-24	1	-3/+0
*	vhdl: introduce iir_kind_association_element_by_name	Tristan Gingold	2021-08-06	1	-0/+1
*	vhdl: add Iir_Kind_Foreign_Module	Tristan Gingold	2021-04-05	1	-0/+3
*	Add support for PSL onehot/onehot0 functions (#1633)	T. Meissner	2021-02-09	1	-0/+4
*	update license headers	umarcor	2021-01-14	1	-11/+9
*	vhdl: improve error message for invalid record element constraint.	Tristan Gingold	2020-12-31	1	-1/+1
*	vhdl: parse subprogram instantiations. For #1470	Tristan Gingold	2020-09-24	1	-0/+4
*	vhdl: parse and analyze force/release signal assignment statements.	Tristan Gingold	2020-08-01	1	-0/+4
*	vhdl: --std93c is now an alias for --std=93 -frelaxed	Tristan Gingold	2020-06-13	1	-1/+1
*	vhdl: parse PSL prev/stable/rose/fell builtin calls. For #662	Tristan Gingold	2020-06-02	1	-0/+8
*	synth: correctly quote nets name in error messages.	Tristan Gingold	2020-05-09	1	-1/+1
*	vhdl: fix handling of types name in name attributes. Fix #1268	Tristan Gingold	2020-04-27	1	-0/+1
*	vhdl-errors: give an hint for -frelaxed. Fix #1152	Tristan Gingold	2020-03-06	1	-0/+10
*	ams-vhdl: add support for 'delayed for quantity.	Tristan Gingold	2019-12-31	1	-1/+2
*	ams-vhdl: handle zoh, ltf and ztf attributes.	Tristan Gingold	2019-12-31	1	-0/+6
*	ams-vhdl: add simultaneous null statement.	Tristan Gingold	2019-12-30	1	-0/+4
*	vhdl: improve support of AMS-vhdl (array and record natures, source quantities)	Tristan Gingold	2019-12-28	1	-4/+62
*	Rework errors handling, to have a more generic framework.	Tristan Gingold	2019-10-06	1	-0/+56
*	vhdl: parse verification unit (WIP).	Tristan Gingold	2019-08-17	1	-0/+2
*	vhdl: declare verification units (WIP).	Tristan Gingold	2019-08-16	1	-0/+6
*	Add support for PSL assumptions, used in formal verification (#880)	Pepijn de Vos	2019-08-07	1	-1/+3
*	vhdl: rename Cover_Statement to Cover_Directive.	Tristan Gingold	2019-07-04	1	-1/+1
*	vhdl: parse and analyze restrict directive.	Tristan Gingold	2019-07-04	1	-0/+2
*	vhdl: add anonymous_signal_declaration.	Tristan Gingold	2019-07-03	1	-0/+3
*	vhdl: improve error messages for generate statement.	Tristan Gingold	2019-06-12	1	-1/+1
*	vhdl-errors: avoid a crash on error type.	Tristan Gingold	2019-06-05	1	-0/+3
*	errorout: add messages group instead of continuation.	Tristan Gingold	2019-05-12	1	-15/+10
*	vhdl: minor reformating.	Tristan Gingold	2019-05-11	1	-4/+3
*	vhdl: decouple errorouts a bit more.	Tristan Gingold	2019-05-10	1	-8/+13
*	vhdl: replace Iir_Int64 by Int64, and Iir_Fp64 by Fp64.	Tristan Gingold	2019-05-10	1	-3/+3
*	Extract psl-errors from errorout.	Tristan Gingold	2019-05-10	1	-5/+0
*	vhdl: extract vhdl.errors from errorout.	Tristan Gingold	2019-05-08	1	-0/+990