| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | ownership: fix ghdlsimul | Tristan Gingold | 2016-12-12 | 1 | -0/+1 |
| * | simulation: reuse Mode_Signal_Type from grt.types. | Tristan Gingold | 2016-03-10 | 1 | -14/+11 |
| * | elaboration: use std_time to represent time in signal table. | Tristan Gingold | 2016-03-10 | 1 | -1/+2 |
| * | simulation: add block id. | Tristan Gingold | 2016-03-10 | 1 | -0/+9 |
| * | simul: preliminary work to support PSL. | Tristan Gingold | 2016-02-14 | 1 | -0/+19 |
| * | simul: handle vhdl 2008. | Tristan Gingold | 2016-02-06 | 1 | -0/+6 |
| * | simul: use Tables instead of GNAT.Table | Tristan Gingold | 2016-01-27 | 1 | -17/+11 |
| * | simul: fix attribute specification, noop type conversion, indiv sig assoc. | Tristan Gingold | 2016-01-26 | 1 | -1/+4 |
| * | simul: fix various issues. | Tristan Gingold | 2016-01-24 | 1 | -2/+10 |
| * | Adjust simulation after sigptr changes. | Tristan Gingold | 2015-12-19 | 1 | -1/+2 |
| * | Simulation: renaming. | Tristan Gingold | 2015-01-23 | 1 | -2/+2 |
| * | simulation: rework scope_level. | Tristan Gingold | 2015-01-23 | 1 | -1/+4 |
| * | Move translate and simulate. | Tristan Gingold | 2014-11-05 | 1 | -0/+209 |
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index : iCE40/ghdl | |
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