Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Create the simul.ads package (for a namespace). | Tristan Gingold | 2017-11-24 | 1 | -120/+0 |
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* | simulation: refactoring (move block_instance to iir_values). | Tristan Gingold | 2017-11-24 | 1 | -33/+2 |
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* | Annotations: minor reformating. | Tristan Gingold | 2017-11-19 | 1 | -10/+8 |
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* | simulate: add extra_slot. | Tristan Gingold | 2017-11-16 | 1 | -1/+9 |
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* | simulation: remove unused kind_range. | Tristan Gingold | 2016-03-29 | 1 | -2/+1 |
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* | simul: preliminary work to support PSL. | Tristan Gingold | 2016-02-14 | 1 | -2/+4 |
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* | simul: handle vhdl 2008. | Tristan Gingold | 2016-02-06 | 1 | -21/+31 |
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* | simul: support of package instantiation. | Tristan Gingold | 2016-02-06 | 1 | -2/+4 |
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* | simul: handle declarations in configuration. | Tristan Gingold | 2016-01-27 | 1 | -2/+2 |
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* | simulation: use invalid_instance_slot instead of 0. | Tristan Gingold | 2015-01-24 | 1 | -1/+1 |
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* | Simulation: renaming. | Tristan Gingold | 2015-01-23 | 1 | -33/+20 |
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* | simulation: rework scope_level. | Tristan Gingold | 2015-01-23 | 1 | -9/+34 |
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* | Move translate and simulate. | Tristan Gingold | 2014-11-05 | 1 | -0/+120 |