iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	vhdl2008: expanded names in for-generate statements.	Tristan Gingold	2015-01-12	1	-0/+2
*	vhdl2008: handle expanded names in if-generate statements.	Tristan Gingold	2015-01-12	1	-0/+4
*	vhdl08: forbid simple block_specification for labeled if-generate statement.	Tristan Gingold	2015-01-10	1	-0/+9
*	Initial rework for vhdl 2008 generate statements.	Tristan Gingold	2015-01-03	1	-23/+97
*	vhdl 2008: handle sized bit strings.	Tristan Gingold	2014-12-30	1	-14/+41
*	Rework string literals: store literals position.	Tristan Gingold	2014-12-29	1	-51/+24
*	Fix ghdl -m for jit: handle multiple libraries.	Tristan Gingold	2014-12-23	1	-0/+3
*	Reduce size of library_declaration.	Tristan Gingold	2014-12-22	1	-13/+15
*	Recognize some ieee.std_logic_1164 functions.	Tristan Gingold	2014-12-16	1	-1/+23
*	Use same node for implicit and explicit subprogram declarations.	Tristan Gingold	2014-12-15	1	-106/+64
*	Reduce size of configuration declaration and guard signal declaration.	Tristan Gingold	2014-12-14	1	-8/+8
*	reduce size of enumeration_literal.	Tristan Gingold	2014-12-14	1	-25/+14
*	iirs: reduce size of interface objects.	Tristan Gingold	2014-12-14	1	-26/+25
*	iirs: reduce size of signal_declaration.	Tristan Gingold	2014-12-14	1	-14/+24
*	iirs: reduce memory size.	Tristan Gingold	2014-12-14	1	-49/+49
*	Put attribute_value_chain in parent.	Tristan Gingold	2014-12-14	1	-78/+13
*	iirs: move delay_mechanism to flag1; adjust xtools/pnodes.py for new sources.	Tristan Gingold	2014-12-13	1	-3/+3
*	Create src/vhdl subdirectory.	Tristan Gingold	2014-11-04	1	-0/+6445