iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	simul: handle vhdl 2008.	Tristan Gingold	2016-02-06	1	-45/+106
*	simul: fix various issues.	Tristan Gingold	2016-01-24	1	-1/+1
*	Add support for conditional assignments.	Tristan Gingold	2016-01-16	1	-16/+112
*	ghdl_simul debugger: handle function call, consider entity declarations.	Tristan Gingold	2015-11-30	1	-3/+0
*	canon: do not optimize concurrent procedure calls if not whole_analyze.	Tristan Gingold	2015-09-08	1	-2/+6
*	Add context declaration and reference (vhdl 2008).	Tristan Gingold	2015-05-12	1	-3/+5
*	Keep and handle simple name for Block_Specification.	Tristan Gingold	2015-01-16	1	-1/+1
*	canon: fix after previous change (do not generate default config for for-gen)	Tristan Gingold	2015-01-16	1	-1/+1
*	vhdl08: block configuration for if-generate statements.	Tristan Gingold	2015-01-10	1	-6/+17
*	Canon: do not free old concurrent statement.	Tristan Gingold	2015-01-08	1	-2/+0
*	Handle vhdl08 if generate statements	Tristan Gingold	2015-01-07	1	-2/+21
*	Initial rework for vhdl 2008 generate statements.	Tristan Gingold	2015-01-03	1	-45/+72
*	Use same node for implicit and explicit subprogram declarations.	Tristan Gingold	2014-12-15	1	-6/+1
*	iirs: reduce size of signal_declaration.	Tristan Gingold	2014-12-14	1	-1/+1
*	Put attribute_value_chain in parent.	Tristan Gingold	2014-12-14	1	-2/+0
*	Create src/vhdl subdirectory.	Tristan Gingold	2014-11-04	1	-0/+2735