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* vhdl and libraries: add support for binding to a foreign moduleTristan Gingold2021-04-051-0/+5
* netlists-disp_vhdl: do not display edge net when not needed. Fix #1703Tristan Gingold2021-03-293-25/+49
* synth: expand ports for record. Fix #1675Tristan Gingold2021-03-273-65/+270
* netlists-dump: also dump attributesTristan Gingold2021-03-173-74/+168
* synth: handle loc attribute (for ports). Fix #1682Tristan Gingold2021-03-172-1/+5
* netlists: do not remove net gates that have an attributeTristan Gingold2021-03-173-25/+36
* synth-expr.adb: add commentsTristan Gingold2021-03-141-0/+5
* synth-expr.adb: handle const right in synth_short_circuit. Fix #1685Tristan Gingold2021-03-141-0/+6
* synth-oper: handle const for numeric_std.match Fix #1679Tristan Gingold2021-03-131-0/+1
* synth-expr: allow non-simple name for FF clocks. Fix #1681Tristan Gingold2021-03-131-12/+17
* synth: handle attributes of length 0. Fix #1680Tristan Gingold2021-03-132-3/+6
* Include directory structure proposal.Michał Kruszewski2021-03-072-1/+1
* synth: handle pow and arctan from ieee.math_real. Fix #1665Tristan Gingold2021-02-271-0/+16
* synth-stmts: handle attributes in block and generate statements. Fix #1658Tristan Gingold2021-02-211-0/+5
* synth-expr: compute signess for range array attributes. Fix #1645Tristan Gingold2021-02-123-17/+9
* netlists-folds: add commentsTristan Gingold2021-02-091-0/+4
* Add support for PSL onehot/onehot0 functions (#1633)T. Meissner2021-02-091-0/+92
* update license headersumarcor2021-02-0590-461/+282
* synth: handle to_stdlogicvector. For #1628Tristan Gingold2021-02-041-1/+2
* std_names: add gclk. For #1610Tristan Gingold2021-01-252-0/+9
* synth-insts: apply attributes to entities and architectures. Fix #1609Tristan Gingold2021-01-172-0/+12
* synth-stmts: add location on formal attribute cellsTristan Gingold2021-01-171-0/+1
* synth-expr: handle string literals in port associations. Fix #1596Tristan Gingold2021-01-161-0/+6
* update license headersumarcor2021-01-142-22/+18
* synth: always finalize declarations. Fix #1591Tristan Gingold2021-01-136-24/+101
* synth: add option to treat asserts as assumes and vice-versatmeissner2021-01-023-3/+18
* netlists-inference: handle multiple dff with the same clock. Fix #1563Tristan Gingold2021-01-014-5/+39
* synth-oper: handle ieee.numeric_std_unsigned.to_integer. Fix #1572Tristan Gingold2021-01-011-0/+1
* synth-expr: propagate error in synth_indexed_nameTristan Gingold2021-01-012-0/+8
* trans-chap3: compute size of subelements for unconstrained parent subtypesTristan Gingold2020-12-291-0/+1
* synth: handle static to_bit and to_bitvector. Fix #1540Tristan Gingold2020-12-203-0/+60
* synth-static_oper: handle to_x01. Fix #1537Tristan Gingold2020-12-141-0/+26
* synth-oper: handle more conversions. Fix #1536Tristan Gingold2020-12-131-1/+3
* synth-static_oper: handle bit xor (scalar and array). Fix #1534Tristan Gingold2020-12-131-2/+23
* synth-static_oper: handle to_stdulogic. For #1534Tristan Gingold2020-12-133-11/+33
* synth-expr: improve handling of null element in a recordTristan Gingold2020-12-121-1/+5
* synth-static_oper: handle xor reduceTristan Gingold2020-12-121-0/+2
* synth: improve handling of null-range nets.Tristan Gingold2020-12-123-6/+35
* synth-insts: comment assert for gcc/gnat-11. Fix #1533Tristan Gingold2020-12-111-1/+4
* synth-stmts: avoid a crash on empty memories.Tristan Gingold2020-12-081-1/+4
* synth: handle static resize from std_numeric. Fix #1531Tristan Gingold2020-12-062-2/+5
* synth-oper: simplify synth_dyadic_vec_log. For #1520Tristan Gingold2020-12-041-10/+4
* synth-oper: Support Iir_Predefined_Enum_Greater{,_Equal}Xiretza2020-12-041-0/+4
* synth: handle dyadic logical vec/log operations. Fix #1520Tristan Gingold2020-12-031-2/+52
* synth-expr.adb: avoid crash on unhandled ieee operator. For #1520Tristan Gingold2020-12-031-7/+16
* synth-objtypes: fix width computation. Fix #1509Tristan Gingold2020-11-161-1/+1
* synth-stmts.adb: fix crash on unconditional exit. Fix #1503Tristan Gingold2020-11-011-26/+76
* synth-expr: improve error message for length mismatchTristan Gingold2020-10-071-1/+4
* synth: check instantiation inputs constraints.Tristan Gingold2020-10-071-3/+11
* netlists-disp_vhdl: handle null vectors for reducation operators.Tristan Gingold2020-09-281-3/+12
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