Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | synth: minor refactoring about const gates. | Tristan Gingold | 2019-09-15 | 4 | -40/+41 |
| | |||||
* | synth-oper: add support of std_match | Tristan Gingold | 2019-09-15 | 1 | -0/+94 |
| | |||||
* | synth-disp_vhdl: improve support of boolean, suv. | Tristan Gingold | 2019-09-15 | 1 | -17/+16 |
| | |||||
* | synth: add build2_const_vec | Tristan Gingold | 2019-09-15 | 2 | -0/+27 |
| | |||||
* | synth-stmts: fix uninitialized variable. | Tristan Gingold | 2019-09-13 | 1 | -1/+9 |
| | |||||
* | synth: initialize subprogram variables. | Tristan Gingold | 2019-09-13 | 4 | -8/+14 |
| | |||||
* | synth: remove get_width from synth-expr | Tristan Gingold | 2019-09-12 | 3 | -15/+2 |
| | |||||
* | synth: extract synth-oper from synth-expr | Tristan Gingold | 2019-09-12 | 6 | -927/+1012 |
| | |||||
* | synth: handle simple_aggregate. | Tristan Gingold | 2019-09-12 | 1 | -0/+41 |
| | |||||
* | synth: allow empty string literal. | Tristan Gingold | 2019-09-12 | 2 | -2/+4 |
| | |||||
* | synth: handle unsigned shift right | Tristan Gingold | 2019-09-11 | 1 | -0/+7 |
| | |||||
* | synth: handle unsigned shift left. | Tristan Gingold | 2019-09-11 | 5 | -107/+163 |
| | |||||
* | synth: add synth_compare_sgn_sgn | Tristan Gingold | 2019-09-11 | 1 | -0/+23 |
| | |||||
* | synth: handle constant bit compare. | Tristan Gingold | 2019-09-11 | 1 | -0/+6 |
| | |||||
* | synth: handle numeric_std.resize for signed. | Tristan Gingold | 2019-09-11 | 1 | -0/+15 |
| | |||||
* | synth: improve support of return statement. | Tristan Gingold | 2019-09-11 | 8 | -21/+117 |
| | |||||
* | synth: improve support of negative integer values. | Tristan Gingold | 2019-09-11 | 2 | -15/+29 |
| | |||||
* | synth: add const_x gate. | Tristan Gingold | 2019-09-11 | 4 | -1/+27 |
| | |||||
* | synth: introduce Seq_Context. | Tristan Gingold | 2019-09-11 | 2 | -68/+87 |
| | |||||
* | synth: move synth_user_function_call to synth-stmts. | Tristan Gingold | 2019-09-11 | 3 | -60/+62 |
| | |||||
* | synth: improve support of slices. | Tristan Gingold | 2019-09-11 | 1 | -50/+54 |
| | |||||
* | synth: introduce slice type. | Tristan Gingold | 2019-09-11 | 4 | -1/+26 |
| | |||||
* | synth: Add width field in type_type record. | Tristan Gingold | 2019-09-11 | 6 | -109/+119 |
| | |||||
* | synth: handle alias (WIP, read only). | Tristan Gingold | 2019-09-11 | 7 | -12/+86 |
| | |||||
* | synth: add const_sb32, add smul/umul. | Tristan Gingold | 2019-09-07 | 6 | -13/+105 |
| | |||||
* | synth: handle partial assignments in case statements. | Tristan Gingold | 2019-09-07 | 3 | -44/+95 |
| | |||||
* | synth-expr: fix regression of issue 7 | Tristan Gingold | 2019-09-06 | 1 | -1/+2 |
| | |||||
* | synth: abstract of Merge_Assigns. | Tristan Gingold | 2019-09-06 | 1 | -56/+111 |
| | |||||
* | synth: handle const record aggregates. | Tristan Gingold | 2019-09-05 | 4 | -21/+64 |
| | |||||
* | synth: handle non-constant array aggregates. | Tristan Gingold | 2019-09-05 | 2 | -1/+15 |
| | |||||
* | synth: add netlists.concats | Tristan Gingold | 2019-09-05 | 3 | -31/+140 |
| | |||||
* | synth: add value_const_array. | Tristan Gingold | 2019-09-05 | 4 | -18/+68 |
| | |||||
* | synth-disp_vhdl: handle arrays in disp_out_converter. | Tristan Gingold | 2019-09-05 | 1 | -1/+19 |
| | |||||
* | synth: handle const_bit in disp_constant_inline. | Tristan Gingold | 2019-09-04 | 1 | -0/+4 |
| | |||||
* | synth: handle large width in get_net. | Tristan Gingold | 2019-09-04 | 2 | -4/+14 |
| | |||||
* | synth-disp_vhdl: handle records for outputs. | Tristan Gingold | 2019-09-04 | 1 | -42/+76 |
| | |||||
* | synth-disp_vhdl: handle record for input ports. | Tristan Gingold | 2019-09-03 | 7 | -41/+108 |
| | |||||
* | synth: subtype conversion before compare. | Tristan Gingold | 2019-09-03 | 1 | -2/+7 |
| | |||||
* | synth: handle conditional variable assignment. | Tristan Gingold | 2019-09-02 | 1 | -0/+34 |
| | |||||
* | vhdl synth: recognize more operators (add uns log). | Tristan Gingold | 2019-09-02 | 1 | -7/+56 |
| | |||||
* | synth: remove insert gate. | Tristan Gingold | 2019-08-31 | 4 | -70/+0 |
| | |||||
* | synth: improve synth_uresize. | Tristan Gingold | 2019-08-31 | 3 | -26/+50 |
| | |||||
* | synth: elab subprogram interfaces subtype | Tristan Gingold | 2019-08-31 | 1 | -2/+13 |
| | |||||
* | [PATCH] synth-environment: fix thinkos. | Tristan Gingold | 2019-08-31 | 1 | -14/+57 |
| | |||||
* | synth: add physical division (#904) | tgingold | 2019-08-30 | 1 | -1/+11 |
|\ | | | | | | | | | | | * synth: added division of physical type * testsuite/synth: added test for the physical division | ||||
| * | synth: added division of physical type | Martin Doerfelt | 2019-08-30 | 1 | -1/+11 |
| | | |||||
* | | synth: add support for --synth on llvm, link with -lm. | Tristan Gingold | 2019-08-30 | 1 | -0/+4 |
| | | |||||
* | | synth: fix type elaboration of interfaces. | Tristan Gingold | 2019-08-30 | 1 | -2/+0 |
| | | |||||
* | | synth: remove unused const gates. | Tristan Gingold | 2019-08-30 | 2 | -13/+5 |
| | | |||||
* | | synth: ignore report statement. | Tristan Gingold | 2019-08-30 | 1 | -0/+2 |
| | |